[Qemu-devel] [Bug 1052380] Re: qemu 1.0.50-2012.03-0ubuntu2 makes ARMv6k kernels crash

** Branch linked: lp:ubuntu/qemu-linaro -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1052380 Title: qemu 1.0.50-2012.03-0ubuntu2 makes ARMv6k kernels crash Status in QEMU: Fix Released Status i

Re: [Qemu-devel] [PATCH 6/9] mm: compaction: Acquire the zone->lock as late as possible

On Fri, 21 Sep 2012 11:46:20 +0100 Mel Gorman wrote: > Compactions free scanner acquires the zone->lock when checking for PageBuddy > pages and isolating them. It does this even if there are no PageBuddy pages > in the range. > > This patch defers acquiring the zone lock for as long as possible.

Re: [Qemu-devel] [PATCH 8/9] mm: compaction: Cache if a pageblock was scanned and no pages were isolated

On Fri, 21 Sep 2012 11:46:22 +0100 Mel Gorman wrote: > When compaction was implemented it was known that scanning could potentially > be excessive. The ideal was that a counter be maintained for each pageblock > but maintaining this information would incur a severe penalty due to a > shared writa

Re: [Qemu-devel] [PATCH v2 1/1] target-i386: Fix default Hypervisor level for hypervisor-vendor=kvm.

On 09/21/12 17:53, Eduardo Habkost wrote: On Fri, Sep 21, 2012 at 05:28:27PM -0400, Don Slutz wrote: On 09/21/12 16:49, Eduardo Habkost wrote: On Fri, Sep 21, 2012 at 04:26:58PM -0400, Don Slutz wrote: On 09/21/12 10:18, Eduardo Habkost wrote: On Thu, Sep 20, 2012 at 04:06:27PM -0400, Don Slu

[Qemu-devel] [PATCH 02/14] tcg-sparc: Hack in qemu_ld/st64 for 32-bit.

Not actually implemented, but at least we avoid the tcg assert at startup. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index baed3b4..608fc46 100644 --- a/tcg/sparc/tcg-target.c

[Qemu-devel] [PATCH 01/14] linux-user: Use memcpy in get_user/put_user.

When host and target have differing alignment rules, using a cast and direct memory operation can result in SIGBUS. Use memcpy instead, which the compiler will happily optimize when alignment is satisfied. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/qemu.h | 47 +

[Qemu-devel] [PATCH 09/14] tcg-sparc: Clean up cruft stemming from attempts to use global registers.

Don't use -ffixed-gN. Don't link statically. Don't save/restore AREG0 around calls. Don't allocate space on the stack for AREG0 save. Signed-off-by: Richard Henderson --- configure | 12 --- tcg/sparc/tcg-target.c | 55 +- t

[Qemu-devel] [PATCH 08/14] tcg-sparc: Change AREG0 in generated code to %i0.

We can now move the TCG variable from %g[56] to a call-preserved windowed register. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 3 ++- tcg/sparc/tcg-target.h | 8 +--- 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-targ

[Qemu-devel] [PATCH 07/14] tcg-sparc: Support GUEST_BASE.

Signed-off-by: Richard Henderson --- configure | 2 ++ tcg/sparc/tcg-target.c | 26 +++--- tcg/sparc/tcg-target.h | 2 ++ 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/configure b/configure index df888f2..0dc4170 100755 --- a/configure +++ b/co

[Qemu-devel] [PATCH 03/14] tcg-sparc: Fix ADDX opcode.

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 608fc46..0a19313 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -236,7 +236,7 @@ static inline

[Qemu-devel] [PATCH 06/14] tcg-sparc: Fix qemu_ld/st to handle 32-bit host.

At the same time, split out the tlb load logic to a new function. Fixes the cases of two data registers and two address registers. Fixes the signature of, and adds missing, qemu_ld/st opcodes. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 777 ++---

[Qemu-devel] [PATCH 05/14] tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.

Current code doesn't actually work in 32-bit mode at all. Since no one really noticed, drop the complication of v7 and v8 cpus. Eliminate the --sparc_cpu configure option and standardize macro testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS Signed-off-by: Richard Henderson --- configure

[Qemu-devel] [PATCH 11/14] tcg-sparc: Use defines for temporaries.

And change from %i4/%i5 to %g1/%o7 to remove a v8plus fixme. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 115 + 1 file changed, 59 insertions(+), 56 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index

[Qemu-devel] [PATCH 14/14] tcg-sparc: Preserve branch destinations during retranslation

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 1db0c9d..876da4f 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -488,30 +

[Qemu-devel] [PATCH 13/14] tcg-sparc: Fix and enable direct TB chaining.

Signed-off-by: Richard Henderson --- exec-all.h | 9 ++--- tcg/sparc/tcg-target.c | 21 ++--- 2 files changed, 24 insertions(+), 6 deletions(-) diff --git a/exec-all.h b/exec-all.h index dba9609..6516da0 100644 --- a/exec-all.h +++ b/exec-all.h @@ -132,9 +132,10

[Qemu-devel] [PATCH v3 00/14] Sparc TCG cleanup

Changes since v2: * Patch 4 split out from patch 5 (afaerber feedback) * TB chaining preserves wrt retranslation * Last patch for branch retranslation is new The patch set is rebased on cfb75cb9807463ebe18b127096b48b5d0db1ce03 and is available at git://repo.or.cz/qemu/rth.git tcg-sparc

[Qemu-devel] [PATCH 04/14] tcg-sparc: Don't MAP_FIXED on top of the program

The address we pick in sparc64.ld is also 0x6000, so doing a fixed map on top of that is guaranteed to blow up. Choosing 0x4000 is exactly right for the max of code_gen_buffer_size set below. No need to ever use MAP_FIXED. While getting our desired address helps optimize the generated co

[Qemu-devel] [PATCH 10/14] tcg-sparc: Mask shift immediates to avoid illegal insns.

The xtensa-test image generates a sra_i32 with count 0x40. Whether this is accident of tcg constant propagation or originating directly from the instruction stream is immaterial. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 18 -- 1 file changed, 12 insertions(+)

[Qemu-devel] [PATCH 12/14] tcg-sparc: Add %g/%o registers to alloc_order

Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 13 + 1 file changed, 13 insertions(+) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index d401f8e..03c385a 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -78,12 +78,25 @@ static const i

[Qemu-devel] [PATCH 5/8] tcg: Implement concat*_i64 with deposit_i64

For tcg_gen_concat_i32_i64 we only use deposit if the host supports it. For tcg_gen_concat32_i64 even if the host does not, as we get identical code before and after. Note that this relies on the ANDI -> EXTU patch for the identity claim. Signed-off-by: Richard Henderson --- tcg/tcg-op.h | 60 +

[Qemu-devel] [PATCH] tcg-hppa: Implement movcond

Signed-off-by: Richard Henderson --- tcg/hppa/tcg-target.c | 21 + tcg/hppa/tcg-target.h | 2 +- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c index 5385d45..793b90d 100644 --- a/tcg/hppa/tcg-target.c +++ b/tcg/hp

[Qemu-devel] [PATCH 1/8] tcg: Adjust descriptions of *cond opcodes

The README file documented the operand ordering of the tcg_gen_* functions. Since we're documenting opcodes here, use the true operand ordering. Signed-off-by: Richard Henderson Cc: malc --- tcg/README | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tcg/README b/

[Qemu-devel] [PATCH 3/8] tcg: Optimize initial inputs for ori_i64

Copy the same optimizations from ori_i32. Signed-off-by: Richard Henderson --- tcg/tcg-op.h | 19 +-- 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index c8633ff..fd16499 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -559,9 +559,9 @@

[Qemu-devel] [PATCH 2/8] tcg: Emit ANDI as EXTU for appropriate constants

Note that andi_i64 failed to perform even the minimal optimizations promised by the README. Signed-off-by: Richard Henderson --- tcg/tcg-op.h | 67 ++-- 1 file changed, 56 insertions(+), 11 deletions(-) diff --git a/tcg/tcg-op.h b/tcg/tcg-

[Qemu-devel] [PATCH v5 17/17] target-i386: Use Hypervisor leaf extra in -machine pc, accel=tcg.

Signed-off-by: Don Slutz --- target-i386/cpu.c | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e8a21b5..12bd5d4 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1999,6 +1999,17 @@ void cpu_x86_cpuid(CPUX86St

[Qemu-devel] [PATCH v5 12/17] target-i386: Add some known names to Hypervisor vendor.

Signed-off-by: Don Slutz --- target-i386/cpu.c | 57 +++- target-i386/cpu.h | 19 + 2 files changed, 74 insertions(+), 2 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index bfe7b27..478b671 100644 --- a/target-

[Qemu-devel] [PATCH 4/8] tcg: Emit XORI as NOT for appropriate constants

Note that xori_i64 failed to perform even the minimal optimizations promised by the README. Signed-off-by: Richard Henderson --- tcg/tcg-op.h | 19 +++ 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index fd16499..bcfb60b 100644 --- a/t

[Qemu-devel] [PATCH 7/8] tcg: Sanity check deposit inputs

Given these are constants, checking once here means everything after can assume they're correct. Signed-off-by: Richard Henderson --- tcg/tcg-op.h | 8 1 file changed, 8 insertions(+) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index d2fb283..ecb1ac3 100644 --- a/tcg/tcg-op.h +++ b/tcg/tc

[Qemu-devel] [PATCH 6/8] tcg: Add tcg_debug_assert

Like the C assert macro, except only enabled for CONFIG_DEBUG_TCG, and without having to set _NDEBUG and disable all other asserts at the same time. The use of __builtin_unreachable (when available) gives the compiler the same information, which may (or may not) help it optimize better. Signed-of

[Qemu-devel] [PATCH v5 03/17] target-i386: Add Hypervisor level.

Also known as Paravirtualization level or maximim cpuid function present in this leaf. This is just the EAX value for 0x4000. QEMU knows this is KVM_CPUID_SIGNATURE (0x4000). This is based on: Microsoft Hypervisor CPUID Leaves: http://msdn.microsoft.com/en-us/library/windows/hardware

[Qemu-devel] [PATCH v5 08/17] target-i386: Add Hypervisor vendor.

Also known as Paravirtualization vendor. This is EBX, ECX, EDX data for 0x4000. QEMU knows this is KVM_CPUID_SIGNATURE (0x4000). This is based on: Microsoft Hypervisor CPUID Leaves: http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx Linux kernel chang

[Qemu-devel] [PATCH v5 06/17] target-i386: Use Hypervisor level in -machine pc, accel=kvm.

Also known as Paravirtualization level. This change is based on: Microsoft Hypervisor CPUID Leaves: http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx Linux kernel change starts with: http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html Als

[Qemu-devel] [PATCH v5 10/17] target-i386: Use Hypervisor vendor in -machine pc, accel=kvm.

Also known as Paravirtualization vendor. This change is based on: Microsoft Hypervisor CPUID Leaves: http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx Linux kernel change starts with: http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html Al

[Qemu-devel] [PATCH v5 04/17] target-i386: Add cpu object access routines for Hypervisor level.

These are modeled after x86_cpuid_get_xlevel and x86_cpuid_set_xlevel. Signed-off-by: Don Slutz --- target-i386/cpu.c | 29 + 1 files changed, 29 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 25ca986..7b31de9 100644 --- a/ta

[Qemu-devel] [PATCH v5 05/17] target-i386: Add cpu object access routines for Hypervisor level.

These are modeled after x86_cpuid_get_xlevel and x86_cpuid_set_xlevel. Signed-off-by: Don Slutz --- target-i386/cpu.c |8 target-i386/cpu.h |2 ++ 2 files changed, 10 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 7b31de9..e5deca2 100644

[Qemu-devel] [PATCH v5 13/17] target-i386: Add optional Hypervisor leaf extra.

Signed-off-by: Don Slutz --- target-i386/cpu.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index ebb3498..254ddef 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -812,6 +812,10 @@ typedef struct CPUX86State { uin

[Qemu-devel] [PATCH v5 09/17] target-i386: Add cpu object access routines for Hypervisor vendor.

These are modeled after x86_cpuid_set_vendor and x86_cpuid_get_vendor. Since kvm's vendor is shorter, the test for correct size is removed and zero padding is added. Set Microsoft's Vendor now that we can. Value defined in: http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v

[Qemu-devel] [PATCH v5 14/17] target-i386: Add cpu object access routines for Hypervisor leaf extra.

Signed-off-by: Don Slutz --- target-i386/cpu.c | 66 + 1 files changed, 66 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 478b671..2423090 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1279

[Qemu-devel] [PATCH v5 11/17] target-i386: Use Hypervisor vendor in -machine pc, accel=tcg.

Also known as Paravirtualization vendor. This change is based on: Microsoft Hypervisor CPUID Leaves: http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx Linux kernel change starts with: http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html Al

[Qemu-devel] [PATCH 8/8] tcg: Sanity check goto_tb input

Checking that we don't try for idx != [01] is trivial. Checking that we don't issue more than one of any index requires a tad more data and some ifdefs protecting that new variable. Signed-off-by: Richard Henderson Cc: Max Filippov --- tcg/tcg-op.h | 11 +-- tcg/tcg.c| 4 tcg

[Qemu-devel] [PATCH v5 07/17] target-i386: Use Hypervisor level in -machine pc, accel=tcg.

Also known as Paravirtualization level. This change is based on: Microsoft Hypervisor CPUID Leaves: http://msdn.microsoft.com/en-us/library/windows/hardware/ff542428%28v=vs.85%29.aspx Linux kernel change starts with: http://fixunix.com/kernel/538707-use-cpuid-communicate-hypervisor.html Als

[Qemu-devel] [PATCH 0/8] Misc tcg improvements

The subject of the andi and assertion patches has come up on this list earlier this week, between Max Filippov, malc and myself. The posibility of using deposit to implement concat occurred to me while working on the MIPS FPU conversion patch. r~ Richard Henderson (8): tcg: Adjust descriptio

[Qemu-devel] [PATCH v5 16/17] target-i386: Use Hypervisor leaf extra in -machine pc, accel=kvm.

Signed-off-by: Don Slutz --- target-i386/kvm.c | 19 +++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index f8a5177..ff82034 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -454,6 +454,25 @@ int kvm_arch_init_vcp

[Qemu-devel] [PATCH v5 15/17] target-i386: Add setting of Hypervisor leaf extra for known vmare4.

This was taken from: http://article.gmane.org/gmane.comp.emulators.kvm.devel/22643 Signed-off-by: Don Slutz --- target-i386/cpu.c | 32 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 2423090..e8a21b

[Qemu-devel] [PATCH v5 01/17] target-i386: Allow tsc-frequency to be larger then 2.147G

The check using INT_MAX (2147483647) is wrong in this case. Signed-off-by: Fred Oliveira Signed-off-by: Don Slutz --- target-i386/cpu.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index af50a8f..0313cf5 100644 --- a/target-i386

[Qemu-devel] [PATCH v5 02/17] target-i386: Add missing kvm bits.

Fix duplicate name (kvmclock => kvm_clock2) also. Signed-off-by: Don Slutz --- target-i386/cpu.c | 12 1 files changed, 8 insertions(+), 4 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 0313cf5..25ca986 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c

[Qemu-devel] [PATCH v5 00/17] Allow changing of Hypervisor CPUIDs.

Also known as Paravirtualization CPUIDs. This is primarily done so that the guest will think it is running under vmware when hypervisor-vendor=vmware is specified as a property of a cpu. This depends on: http://lists.gnu.org/archive/html/qemu-devel/2012-09/msg01400.html As far as I know it is

Re: [Qemu-devel] [PATCH 18/22] qidl: add lexer library (based on QC parser)

On Fri, Sep 21, 2012 at 05:18:09PM -0600, Eric Blake wrote: > On 09/21/2012 08:07 AM, Michael Roth wrote: > > Adds an abstract Lexer class to handle tokenizer via a > > peek/pop/peekline/popline interface, along with an implementation for C > > based on the lexer from qc.git > > > > Signed-off-by:

Re: [Qemu-devel] [PATCH v2 00/10] tcg/optimize: rework copy propagation

On 09/21/2012 12:43 PM, Aurelien Jarno wrote: > Changes v1 -> v2 > - fixed conflict in patch 3 following movcond introduction > - movcond optimization added in patch 7 > - added patch 10 > > Aurelien Jarno (10): > tcg/optimize: remove TCG_TEMP_ANY > tcg/optimize: check types in copy propaga

Re: [Qemu-devel] [PATCH v2 10/10] tcg/optimize: add constant folding for deposit

On 09/21/2012 12:43 PM, Aurelien Jarno wrote: > +tmp = ((1ull << args[4]) - 1); > +tmp = (temps[args[1]].val & ~(tmp << args[3])) > + | ((temps[args[2]].val & tmp) << args[3]); > +tcg_opt_gen_movi(gen_args, args[0], tmp); We do h

Re: [Qemu-devel] [PATCH 19/22] qidl: add C parser (based on QC parser)

On 09/21/2012 08:07 AM, Michael Roth wrote: > This introduces the QIDL parser to process QIDL annotations in C files. > This code is mostly a straight import from qc.git, with some reworking > to handle the declaration/annotation format and lexer we're using for > QEMU. > > Signed-off-by: Michael

Re: [Qemu-devel] [PATCH 18/22] qidl: add lexer library (based on QC parser)

On 09/21/2012 08:07 AM, Michael Roth wrote: > Adds an abstract Lexer class to handle tokenizer via a > peek/pop/peekline/popline interface, along with an implementation for C > based on the lexer from qc.git > > Signed-off-by: Michael Roth > --- > scripts/lexer.py | 306 > +

Re: [Qemu-devel] [PATCH v2 07/10] tcg/optimize: further optimize brcond/movcond/setcond

On 09/21/2012 12:43 PM, Aurelien Jarno wrote: > +/* Return 2 if the condition can't be simplified, and the result > + of the condition (0 or 1) if it can */ Ok as-is. But I'd bike-shed the "fail" return to -1. r~

Re: [Qemu-devel] [PATCH 17/22] qidl: add documentation

On 09/21/2012 08:07 AM, Michael Roth wrote: > Signed-off-by: Michael Roth > --- > docs/qidl.txt | 347 > + > 1 file changed, 347 insertions(+) > create mode 100644 docs/qidl.txt > +Specifying What/How State Gets Saved > +

Re: [Qemu-devel] [PATCH v2 3/5] target-arm: convert sar, shl and shr helpers to TCG

On 09/21/2012 12:33 PM, Aurelien Jarno wrote: > +static void gen_sar(TCGv dest, TCGv t0, TCGv t1) > +{ > +TCGv tmp1, tmp2, tmp3; > +tmp1 = tcg_temp_new_i32(); > +tcg_gen_andi_i32(tmp1, t1, 0xff); > +tmp2 = tcg_const_i32(0x1f); > +tmp3 = tcg_const_i32(0); > +tcg_gen_movcond_i

Re: [Qemu-devel] [RFC PATCH v3 12/19] Implement "info memory-total" and "query-memory-total"

On 09/21/2012 05:17 AM, Vasilis Liaskovitis wrote: > Returns total physical memory available to guest in bytes, including > hotplugged > memory. Note that the number reported here may be different from what the > guest > sees e.g. if the guest has not logically onlined hotplugged memory. > > Thi

Re: [Qemu-devel] [PATCH v2 0/7] tcg: movcond (ppc32 version)

On Fri, 21 Sep 2012, Richard Henderson wrote: > On 09/21/2012 01:10 PM, malc wrote: > > +if (dest == v2) { > > +label_ptr = s->code_ptr; > > +tcg_out32 (s, tcg_to_bc[tcg_invert_cond (cond)]); > > +tcg_out_mov (s, TCG_TYPE_I32, dest, v1); > > +

Re: [Qemu-devel] [PATCH 7/7] tcg: Streamline movcond_i64 using movcond_i32

On 09/21/2012 02:23 PM, Aurelien Jarno wrote: > Now I wonder if it wouldn't be better to write brcond2 as setcond2 + > brcond. And even setcond2 as a pair of setcond in TCG, which would allow > some optimizations in case both high parts are zero. I think brcond2 vs setcond2 is a choice that has to

Re: [Qemu-devel] [PATCH v2 0/7] tcg: movcond (ppc32 version)

On 09/21/2012 01:10 PM, malc wrote: > +if (dest == v2) { > +label_ptr = s->code_ptr; > +tcg_out32 (s, tcg_to_bc[tcg_invert_cond (cond)]); > +tcg_out_mov (s, TCG_TYPE_I32, dest, v1); > +reloc_pc14 (label_ptr, (tcg_target_long) s->code_ptr); > +

Re: [Qemu-devel] [PATCH 6/9] mm: compaction: Acquire the zone->lock as late as possible

On Fri, Sep 21, 2012 at 11:46:20AM +0100, Mel Gorman wrote: > Compactions free scanner acquires the zone->lock when checking for PageBuddy > pages and isolating them. It does this even if there are no PageBuddy pages > in the range. > > This patch defers acquiring the zone lock for as long as poss

Re: [Qemu-devel] [PATCH 8/9] mm: compaction: Cache if a pageblock was scanned and no pages were isolated

On Fri, Sep 21, 2012 at 11:46:22AM +0100, Mel Gorman wrote: > When compaction was implemented it was known that scanning could potentially > be excessive. The ideal was that a counter be maintained for each pageblock > but maintaining this information would incur a severe penalty due to a > shared

Re: [Qemu-devel] [PATCH 3/9] Revert "mm: compaction: abort compaction loop if lock is contended or run too long"

On Fri, Sep 21, 2012 at 11:46:17AM +0100, Mel Gorman wrote: > This reverts > mm-compaction-abort-compaction-loop-if-lock-is-contended-or-run-too-long.patch > as it is replaced by a later patch in the series. > > Signed-off-by: Mel Gorman Acked-by: Rafael Aquini

Re: [Qemu-devel] [RFC PATCH v3 11/19] Implement qmp and hmp commands for notification lists

On 09/21/2012 05:17 AM, Vasilis Liaskovitis wrote: > Guest can respond to ACPI hotplug events e.g. with _EJ or _OST method. > This patch implements a tail queue to store guest notifications for memory > hot-add and hot-remove requests. > > Guest responses for memory hotplug command on a per-dimm b

Re: [Qemu-devel] [PATCH v2 1/1] target-i386: Fix default Hypervisor level for hypervisor-vendor=kvm.

On Fri, Sep 21, 2012 at 05:28:27PM -0400, Don Slutz wrote: > > On 09/21/12 16:49, Eduardo Habkost wrote: > >On Fri, Sep 21, 2012 at 04:26:58PM -0400, Don Slutz wrote: > >>On 09/21/12 10:18, Eduardo Habkost wrote: > >>>On Thu, Sep 20, 2012 at 04:06:27PM -0400, Don Slutz wrote: > From http://lk

Re: [Qemu-devel] [PATCH 9/9] mm: compaction: Restart compaction from near where it left off

On Fri, Sep 21, 2012 at 11:46:23AM +0100, Mel Gorman wrote: > This is almost entirely based on Rik's previous patches and discussions > with him about how this might be implemented. > > Order > 0 compaction stops when enough free pages of the correct page > order have been coalesced. When doing s

Re: [Qemu-devel] [PATCH 4/9] mm: compaction: Abort compaction loop if lock is contended or run too long

On Fri, Sep 21, 2012 at 11:46:18AM +0100, Mel Gorman wrote: > From: Shaohua Li > > Changelog since V2 > o Fix BUG_ON triggered due to pages left on cc.migratepages > o Make compact_zone_order() require non-NULL arg `contended' > > Changelog since V1 > o only abort the compaction if lock is conte

Re: [Qemu-devel] [PATCH 4/9] mm: compaction: Abort compaction loop if lock is contended or run too long

On Fri, 21 Sep 2012 11:46:18 +0100 Mel Gorman wrote: > Changelog since V2 > o Fix BUG_ON triggered due to pages left on cc.migratepages > o Make compact_zone_order() require non-NULL arg `contended' > > Changelog since V1 > o only abort the compaction if lock is contended or run too long > o Rea

Re: [Qemu-devel] [PATCH 7/9] Revert "mm: have order > 0 compaction start off where it left"

On Fri, Sep 21, 2012 at 11:46:21AM +0100, Mel Gorman wrote: > This reverts commit 7db8889a (mm: have order > 0 compaction start off > where it left) and commit de74f1cc (mm: have order > 0 compaction start > near a pageblock with free pages). These patches were a good idea and > tests confirmed tha

Re: [Qemu-devel] [PATCH 5/9] mm: compaction: Acquire the zone->lru_lock as late as possible

On Fri, Sep 21, 2012 at 11:46:19AM +0100, Mel Gorman wrote: > Compactions migrate scanner acquires the zone->lru_lock when scanning a range > of pages looking for LRU pages to acquire. It does this even if there are > no LRU pages in the range. If multiple processes are compacting then this > can c

Re: [Qemu-devel] [PATCH 2/9] Revert "mm-compaction-abort-compaction-loop-if-lock-is-contended-or-run-too-long-fix"

On Fri, Sep 21, 2012 at 11:46:16AM +0100, Mel Gorman wrote: > This reverts > mm-compaction-abort-compaction-loop-if-lock-is-contended-or-run-too-long-fix > as it is replaced by a later patch in the series. > > Signed-off-by: Mel Gorman Acked-by: Rafael Aquini

Re: [Qemu-devel] [PATCH 1/9] Revert "mm: compaction: check lock contention first before taking lock"

On Fri, Sep 21, 2012 at 11:46:15AM +0100, Mel Gorman wrote: > This reverts > mm-compaction-check-lock-contention-first-before-taking-lock.patch as it > is replaced by a later patch in the series. > > Signed-off-by: Mel Gorman Acked-by: Rafael Aquini

Re: [Qemu-devel] [PATCH v2 1/1] target-i386: Fix default Hypervisor level for hypervisor-vendor=kvm.

On 09/21/12 16:49, Eduardo Habkost wrote: On Fri, Sep 21, 2012 at 04:26:58PM -0400, Don Slutz wrote: On 09/21/12 10:18, Eduardo Habkost wrote: On Thu, Sep 20, 2012 at 04:06:27PM -0400, Don Slutz wrote: From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html EAX should be KVM_CP

Re: [Qemu-devel] [PATCH 7/7] tcg: Streamline movcond_i64 using movcond_i32

On Fri, Sep 21, 2012 at 10:13:40AM -0700, Richard Henderson wrote: > When movcond_i32 is available we can further reduce the generated > op count from 12 to 6, and the generated code size on i686 from > 88 to 74 bytes. > > Signed-off-by: Richard Henderson > --- > tcg/tcg-op.h | 22 ++

Re: [Qemu-devel] [PATCH 6/7] tcg: Streamline movcond_i64 using 32-bit arithmetic

On Fri, Sep 21, 2012 at 10:13:39AM -0700, Richard Henderson wrote: > Avoiding 64-bit arithmetic (outside of the compare) reduces the > generated op count from 15 to 12, and the generated code size on > i686 from 105 to 88 bytes. > > Signed-off-by: Richard Henderson > --- > tcg/tcg-op.h | 42

Re: [Qemu-devel] [PATCH 04/10] tcg/mips: don't use global pointer

On Fri, Sep 21, 2012 at 11:18:39AM -0700, Richard Henderson wrote: > On 09/21/2012 09:43 AM, Aurelien Jarno wrote: > > Don't use the global pointer in TCG, in case helpers try access global > > variables. > > Err.. isn't the GP computed at the entry point of functions that need to use > it? I re

Re: [Qemu-devel] [PATCH 11/14] buffered_file: don't flush on put buffer

On 09/21/2012 09:34 AM, Paolo Bonzini wrote: > Il 21/09/2012 16:08, Juan Quintela ha scritto: >> We call buffered_put_buffer with iothread held, and buffered_flush() does >> synchronous writes. We only want to do the synchronous writes outside. >> > > This means that the buffer can grow to up to

Re: [Qemu-devel] [PATCH v2 1/1] target-i386: Fix default Hypervisor level for hypervisor-vendor=kvm.

On Fri, Sep 21, 2012 at 04:26:58PM -0400, Don Slutz wrote: > On 09/21/12 10:18, Eduardo Habkost wrote: > >On Thu, Sep 20, 2012 at 04:06:27PM -0400, Don Slutz wrote: > >> From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html > >>EAX should be KVM_CPUID_FEATURES (0x4001) not 0. >

[Qemu-devel] [PATCH v2 08/10] tcg/optimize: prefer the "op a, a, b" form for commutative ops

The "op a, a, b" form is better handled on non-RISC host than the "op a, b, a" form, so swap the arguments to this form when possible, and when b is not a constant. This reduces the number of generated instructions by a tiny bit. Signed-off-by: Aurelien Jarno --- tcg/optimize.c |5 - 1

[Qemu-devel] [PATCH v2 2/5] target-arm: convert add_cc and sub_cc helpers to TCG

Now that the setcond TCG op is available, it's possible to replace add_cc and sub_cc helpers by TCG code. The code generated by TCG is actually very close to the one generated by GCC for the helper, and this avoid all the consequences of using an helper: globals saved back to memory, no possible op

[Qemu-devel] [PATCH v2 1/5] target-arm: use globals for CC flags

Use globals for CC flags instead of loading/storing them each they are accessed. This allows some optimizations to be performed by the TCG optimization passes. Cc: Peter Maydell Signed-off-by: Aurelien Jarno --- target-arm/translate.c | 127 ++-- 1 f

[Qemu-devel] [PATCH v2 09/10] tcg: remove #ifdef #endif around TCGOpcode tests

Commit 25c4d9cc changed all TCGOpcode enums to be available, so we don't need to #ifdef #endif the one that are available only on some targets. This makes the code easier to read. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/tcg.c | 13 + 1 file changed, 1

[Qemu-devel] [PATCH v2 3/5] target-arm: convert sar, shl and shr helpers to TCG

Now that the movcond TCG op is available, it's possible to replace shl and shr helpers by TCG code. The code generated by TCG is slightly longer than the code generated by GCC for the helper but is still worth it as this avoid all the consequences of using an helper: globals saved back to memory, n

[Qemu-devel] [PATCH v2 01/10] tcg/optimize: remove TCG_TEMP_ANY

TCG_TEMP_ANY has no different meaning than TCG_TEMP_UNDEF, so use the later instead. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/optimize.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 1be7631..3

[Qemu-devel] [PATCH v2 4/5] target-arm: mark a few integer helpers const and pure

Cc: Peter Maydell Signed-off-by: Aurelien Jarno --- target-arm/helper.h | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/target-arm/helper.h b/target-arm/helper.h index 794e2b1..8b9adf1 100644 --- a/target-arm/helper.h +++ b/target-arm/helper.h @@ -1,8 +

[Qemu-devel] [PATCH] fix endianess when changing memory with balloon.

Signed-off-by: Victor Toso --- hw/virtio-balloon.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/virtio-balloon.c b/hw/virtio-balloon.c index dd1a650..9e0cd88 100644 --- a/hw/virtio-balloon.c +++ b/hw/virtio-balloon.c @@ -193,12 +193,15 @@ static void virtio_balloon_

Re: [Qemu-devel] [PATCH v2 1/1] target-i386: Fix default Hypervisor level for hypervisor-vendor=kvm.

On 09/21/12 10:18, Eduardo Habkost wrote: On Thu, Sep 20, 2012 at 04:06:27PM -0400, Don Slutz wrote: From http://lkml.indiana.edu/hypermail/linux/kernel/1205.0/00100.html EAX should be KVM_CPUID_FEATURES (0x4001) not 0. Added hypervisor-vendor=kvm0 to get the older CPUID result. kvm1 selec

Re: [Qemu-devel] [PATCH 13/13] tcg: Fix !USE_DIRECT_JUMP

Am 17.09.2012 17:50, schrieb Andreas Färber: Am 17.09.2012 17:28, schrieb Richard Henderson: Commit 6375e09e changed the type of TranslationBlock.tb_next, but failed to change the type of TCGContext.tb_next. Signed-off-by: Richard Henderson Reviewed-by: Andreas Färber /-F --- tcg/tcg.h |

[Qemu-devel] [PATCH v2 0/5] target-arm: misc optimizations

This patch series optimizes the ARM target by: - using globals instead of ld/st function - using TCG code instead of helpers - marking some helpers const and pure -- Changes v1 -> v2 - updated patch 3 to use movcond instead of setcond. Also converted sar. - updated patch 4 following changes i

[Qemu-devel] [PATCH v2 02/10] tcg/optimize: check types in copy propagation

The copy propagation doesn't check the types of the temps during copy propagation. However TCG is using the mov_i32 for the i64 to i32 conversion and thus the two are not equivalent. With this patch tcg_opt_gen_mov() doesn't consider two temps of different type as copies anymore. So far it seems

Re: [Qemu-devel] [PATCH v2 0/7] tcg: movcond (ppc32 version)

diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 26c4b33..0fb6fc7 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -390,6 +390,7 @@ static int tcg_target_const_match(tcg_target_long val, #define ORCXO31(412) #define EQVXO31(284) #define NAND XO31(476) +#def

[Qemu-devel] [PATCH v2 5/5] target-arm: use deposit instead of hardcoded version

Use the deposit op instead of and hardcoded bit field insertion. It allows the host to emit the corresponding instruction if available. Signed-off-by: Aurelien Jarno --- target-arm/translate.c | 20 ++-- 1 file changed, 6 insertions(+), 14 deletions(-) diff --git a/target-arm/

Re: [Qemu-devel] [PATCH v5 0/4] VFIO-based PCI device assignment

Ping. There don't seem to be any objections to this. Thanks, Alex On Fri, 2012-09-14 at 17:04 -0600, Alex Williamson wrote: > On Fri, 2012-09-14 at 17:01 -0600, Alex Williamson wrote: > > Same goodness as v4, plus: > > > > - Addressed comments by Blue Swirl (thanks for the review) > >(ho

[Qemu-devel] [PATCH v2 00/10] tcg/optimize: rework copy propagation

This patch series rework the copy propagation in order to generate better code. The first two patches are cleanup and bug fixes, the third

[Qemu-devel] [PATCH v2 05/10] tcg/optimize: optimize "op r, a, a => mov r, a"

Now that we can easily detect all copies, we can optimize the "op r, a, a => mov r, a" case a bit more. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/optimize.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index ae

[Qemu-devel] [PATCH v2 04/10] tcg/optimize: do copy propagation for all operations

It is possible to due copy propagation for all operations, even the one that have side effects or clobber arguments (it only concerns input arguments). That said, the call operation should be handled differently due to the variable number of arguments. Reviewed-by: Richard Henderson Signed-off-by

[Qemu-devel] [PATCH v2 07/10] tcg/optimize: further optimize brcond/movcond/setcond

When both argument of brcond/movcond/setcond are the same or when one of the two values is a constant equal to zero, it's possible to do further optimizations. Signed-off-by: Aurelien Jarno --- tcg/optimize.c | 127 +--- 1 file changed, 76 ins

[Qemu-devel] [PATCH v2 10/10] tcg/optimize: add constant folding for deposit

Signed-off-by: Aurelien Jarno --- tcg/optimize.c | 20 1 file changed, 20 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index c8ae50b..35532a1 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -668,6 +668,26 @@ static TCGArg *tcg_constant_folding(TCGContext

[Qemu-devel] [PATCH v2 03/10] tcg/optimize: rework copy progagation

The copy propagation pass tries to keep track what is a copy of what and what has copy of what, and in addition it keep a circular list of of all the copies. Unfortunately this doesn't fully work: a mov from a temp which has a state "COPY" changed it into a state "HAS_COPY". Later when this temp is

[Qemu-devel] [PATCH v2 06/10] tcg/optimize: optimize "op r, a, a => movi r, 0"

Now that it's possible to detect copies, we can optimize the case the "op r, a, a => movi r, 0". This helps in the computation of overflow flags when one of the two args is 0. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/optimize.c | 16 1 file changed

Re: [Qemu-devel] [PATCH 04/25] ahci: add ide device initialization helper

On Fri, Sep 21, 2012 at 04:05:14PM +0200, Markus Armbruster wrote: > Jason Baron writes: > > > From: Isaku Yamahata > > > > Introduce a helper function which initializes the ahci port with ide > > devices. > > It will be used by q35 support. > > > > Cc: Alexander Graf > > Signed-off-by: Isaku

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