On 01/24/2012 06:19 PM, Thomas Higdon wrote:
I agree that it's better to get this into a more general place. However,
I wasn't willing to pull the MIN statement up into scsi_send_command
because I don't understand the interplay between 'len' in that function
and r->iov.iov_len. I couldn't see tha
On 01/25/2012 10:37 PM, Anthony Liguori wrote:
On 01/25/2012 03:30 PM, Andreas Färber wrote:
Am 24.01.2012 20:32, schrieb Anthony Liguori:
This class provides the main building block for QEMU Object Model and is
extensively documented in the header file. It is largely inspired by
GObject.
Sign
Eric Blake writes:
> On 01/25/2012 03:23 PM, Ronnie Sahlberg wrote:
>> Update the readconfig filename parsing to allow specifying an existing,
>> inherited, filedescriptor as 'fd:'
>> This is useful when you want to pass potentially sensitive onfiguration data
>> to qemu without having it hit t
On Wed, Jan 25, 2012 at 10:07:14PM +0100, Erik Rull wrote:
> Is it possible that you provide this patch? Or was it already
> applied somewhere?
>
No patch needed. Just do "rm x86_64-softmmu/qmp-commands.h".
--
Gleb.
On 12/02/2011 01:32 PM, Anthony Liguori wrote:
>> But we already have to call 'qemu -h' for other reasons; so we might as
>> well be efficient and learn as much as possible from that result than by
>> calling both 'qemu -h' and 'qemu -qmp ...', in order to probe what qemu
>> supports.
>>
>> Also, '
On 26/01/12 01:51, Michael S. Tsirkin wrote:
> On Wed, Jan 25, 2012 at 06:46:03PM +1300, Alexey Korolev wrote:
>> Hi,
>> In this post
>> http://lists.gnu.org/archive/html/qemu-devel/2011-12/msg03171.html I've
>> mentioned about the issues when 64Bit PCI BAR is present and 32bit
>> address range is
Hi Alex and Michael
>> For testing, I applied the following patch to qemu,
>> converting msix bar to 64 bit.
>> Guest did not seem to crash.
>> I booted Fedora Live CD 32 bit guest on a 32 bit host
>> to level 3 without crash, and verified that
>> the BAR is a 64 bit one, and that I got assigned an
On Wed, 2012-01-25 at 14:13 +1100, David Gibson wrote:
> On Tue, Dec 20, 2011 at 09:30:37PM -0700, Alex Williamson wrote:
> > On Wed, 2011-12-21 at 14:32 +1100, David Gibson wrote:
> > > On Mon, Dec 19, 2011 at 04:41:56PM +0100, Joerg Roedel wrote:
> > > > On Mon, Dec 19, 2011 at 11:11:25AM +1100,
On 01/25/2012 03:39 PM, Ronnie Sahlberg wrote:
> This patch adds configuration variables for iSCSI to set
> initiator-name to use when logging in to the target,
> which type of header-digest to negotiate with the target
> and username and password for CHAP authentication.
>
> This allows specifyin
On 01/25/2012 03:23 PM, Ronnie Sahlberg wrote:
> Update the readconfig filename parsing to allow specifying an existing,
> inherited, filedescriptor as 'fd:'
> This is useful when you want to pass potentially sensitive onfiguration data
> to qemu without having it hit the filesystem/stable-storag
This patch adds configuration variables for iSCSI to set
initiator-name to use when logging in to the target,
which type of header-digest to negotiate with the target
and username and password for CHAP authentication.
This allows specifying a initiator-name either from the command line
-iscsi init
Kevin, List
Please review and/or apply.
This is version 3 of the patch to add configuration variables for iSCSI.
Version 2 added the feature to specify configuration blocks that apply to a
specific target name, allowing qemu to use different settings if/when
connecting one guest to multiple dif
Update the readconfig filename parsing to allow specifying an existing,
inherited, filedescriptor as 'fd:'
This is useful when you want to pass potentially sensitive onfiguration data to
qemu without having it hit the filesystem/stable-storage
Signed-off-by: Ronnie Sahlberg
---
qemu-config.c
List,
Please find attached a trivial patch to allow -readconfig to read from a
pre-existing filedescriptor instead of a file off disk.
Syntax is '-readconfig fd:' to read from filedescriptor .
This is useful for example for libvirt which allow it to pass configuration
data, including possibly
Fair enough.
I will send a separate tiny patch to add 'fd:' support to specify
to qemu to -readconfig from a preexisting filedescriptor.
Other protocols like 'exec:' can easily be added later as needed.
regards
ronnie sahlberg
On Thu, Jan 26, 2012 at 2:57 AM, Eric Blake wrote:
> On 01/24/2012
On 01/25/2012 03:30 PM, Andreas Färber wrote:
Am 24.01.2012 20:32, schrieb Anthony Liguori:
This class provides the main building block for QEMU Object Model and is
extensively documented in the header file. It is largely inspired by GObject.
Signed-off-by: Anthony Liguori
---
v1 -> v2
- re
Am 24.01.2012 20:32, schrieb Anthony Liguori:
> This class provides the main building block for QEMU Object Model and is
> extensively documented in the header file. It is largely inspired by GObject.
>
> Signed-off-by: Anthony Liguori
> ---
> v1 -> v2
> - remove printf() in type registration
>
Am 25.10.2011 16:34, schrieb Dor Laor:
On 10/18/2011 03:03 PM, Anthony Liguori wrote:
Okay, let's get serious about it. I set up the following wiki page for
coordination:
http://wiki.qemu.org/Relicensing
Please get the appropriate approval at Red Hat, and follow the
ACK for *@redhat.com
in
Jan Kiszka wrote:
On 2012-01-25 12:48, erik.r...@rdsoftware.de wrote:
Hi Jan,
You should CC me then... :)
I will do that for upcoming emails.
This little change fixes my problem with the usb-tablet update rate.
Can you please verify if this has some side effects?
Surely as it disables
On Thu, 12 Jan 2012, Gerd Hoffmann wrote:
Hi,
I'm not sure about the consequences (hotplugging feature, etc.) when
changing it to romfile as in other PCI devices.
There should be no noticable difference.
I don't know the consequences there so I think it is better to let that
code and jus
Gleb Natapov wrote:
On Wed, Jan 25, 2012 at 12:22:51PM +0100, erik.r...@rdsoftware.de wrote:
Hi all,
from the qemu-kvm master I did some bisectioning because I cannot compile it.
I got the same error because of some stale .h file. Removing it resolved
the problem, but I do not remember what w
Option ROM for network interface cards (NICs) can now explicitly disabled
with romfile=disabled (or romfile=no or romfile=none) parameter.
With hotplugable NICs (currently NE2000, PCNET) romfile=(empty) didn't work.
This patch disables Option ROMs for iPXE for alls supported NICs
(hotplugable and
On Sun, 8 Jan 2012, Kevin O'Connor wrote:
On Sun, Jan 08, 2012 at 05:17:45PM +0200, Gleb Natapov wrote:
No - the option rom will always be executed. The purpose of placing
it in the BCV list is to order its execution with respect to other
BCVs so that if the legacy option rom hooks int13 it will
On Sun, 15 Jan 2012, Avi Kivity wrote:
On 01/15/2012 04:40 PM, Gerhard Wiesinger wrote:
On Sun, 15 Jan 2012, Jan Kiszka wrote:
On 2012-01-15 15:17, Avi Kivity wrote:
Otherwise, the dirty log information is lost in the kernel forever.
Fixes opensuse-12.1 boot screen, which changes the vga wi
On 1/25/12, Paolo Bonzini wrote:
> On 01/25/2012 05:34 PM, Artyom Tarasenko wrote:
>> This patch produces the following error when booting Solaris/SPARC:
>>
>> WARNING: /iommu@0,1000/sbus@0,10001000/espdma@5,840/esp@5,880
>> (esp0):
>> data transfer overrun: current esp state:
'-machine accel=tcg -cpu kvm64' doesn't work == bluescreen.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/921208
Title:
win7/x64 installer hangs on startup with 0x005d.
Status in QEMU:
New
On Wed, Jan 25, 2012 at 19:43, Anthony Liguori wrote:
> On 01/25/2012 12:31 PM, Blue Swirl wrote:
>>
>> On Tue, Jan 24, 2012 at 19:32, Anthony Liguori
>> wrote:
>>>
>>> This series makes qdev a proper Object and converts qdev's type
>>> inheritance to
>>> QOM inheritance.
>>>
>>> The first half o
On Tue, 24 Jan 2012, Jan Kiszka wrote:
I can confirm the that this patch fixes a real issue. Setup: qemu.git,
opensuse 11.4 guest, SDL graphic, system_reset while guest is using the
vmmouse. Without the patch, the vmmouse become unusable after the
reboot. Also, the mouse stays in absolute mode ev
Bugfix after reboot when vmmouse was enabled and another OS which uses e.g. PS/2
mouse.
Details:
When a guest activated the vmmouse followed by a reboot the vmmouse was still
enabled and the PS/2 mouse was therefore unsusable. When another guest is then
booted without vmmouse support (e.g. PS/2 m
Blue Swirl writes:
> On Tue, Jan 24, 2012 at 13:05, Avi Kivity wrote:
[...]
>> But please post patches using
>> git-send-email, otherwise they're unthreaded and lose their grouping as
>> soon as someone replies.
>
> I have this in .gitconfig:
> [format]
> thread = true
>
> Maybe threadi
On 25 January 2012 18:04, Andreas Färber wrote:
> Am 24.01.2012 13:39, schrieb Peter Maydell:
>> +struct VEDBoardInfo {
>> + const target_phys_addr_t *motherboard_map;
>> + const target_phys_addr_t loader_start;
>
> const for a value type in a struct looks fishy...is it intentional and
> val
On 01/25/2012 12:31 PM, Blue Swirl wrote:
On Tue, Jan 24, 2012 at 19:32, Anthony Liguori wrote:
This series makes qdev a proper Object and converts qdev's type inheritance to
QOM inheritance.
The first half of the series are manual cleanups/refactorings. The second half
is mostly scripted con
On 25 January 2012 19:25, Xin Tong wrote:
> as I mentioned. In my current implementation of coremu, the code could
> be executed when it is modified. so the modifications need to be
> atomic. I think I need a scratch area in which the restore_cpu_state
> needs to be generated while leaving the alr
as I mentioned. In my current implementation of coremu, the code could
be executed when it is modified. so the modifications need to be
atomic. I think I need a scratch area in which the restore_cpu_state
needs to be generated while leaving the already generated code in
tact. would this solve the p
On 25 January 2012 19:10, Xin Tong wrote:
Peter Maydell wrote:
>> cpu_restore_state() calls gen_intermediate_code_pc() to
>> request a retranslation of the TB with extra info to allow
>> us to do a host-PC-to-guest-PC lookup
>> * Note that gen_intermediate_code_pc() overwrites the generated
>> co
you understood it correctly, I saw the code just after i sent out the email.
Thanks
Xin
On Wed, Jan 25, 2012 at 2:18 PM, James Greensky wrote:
> On Wed, Jan 25, 2012 at 11:10 AM, Xin Tong wrote:
>> cpu_restore_state() calls gen_intermediate_code_pc() to
>> request a retranslation of the TB wi
On Wed, Jan 25, 2012 at 11:10 AM, Xin Tong wrote:
> cpu_restore_state() calls gen_intermediate_code_pc() to
> request a retranslation of the TB with extra info to allow
> us to do a host-PC-to-guest-PC lookup
> * Note that gen_intermediate_code_pc() overwrites the generated
> code that already ex
WIP
Signed-off-by: Blue Swirl
---
NB. This patch is not finished yet.
I was trying the (ugly or impossible even) approach of passing a flag
for endianness (is_be) in vga_init(). However, I noticed that even
with is_be always true, VGA on x86, PPC and Sparc64 all still worked!
What is going on?
cpu_restore_state() calls gen_intermediate_code_pc() to
request a retranslation of the TB with extra info to allow
us to do a host-PC-to-guest-PC lookup
* Note that gen_intermediate_code_pc() overwrites the generated
code that already exists in memory, and stops as soon as it
reaches the point of
Signed-off-by: Orit Wasserman
---
block-migration.c |8
migration.c | 16 +---
migration.h |9 +++--
qemu-common.h |1 +
savevm.c | 12
sysemu.h |4 ++--
vmstate.h |2 +-
7 files changed, 32 i
Leon3 machine is broken in the current git master.
Bisect shows the following:
6281f7d11fa6bfb6da3926359fbe70684e582cb1 is the first bad commit
commit 6281f7d11fa6bfb6da3926359fbe70684e582cb1
Author: Avi Kivity
Date: Mon Nov 14 13:10:13 2011 +0200
grlib_apbuart: convert to memory API
On 01/25/2012 01:48 PM, Avi Kivity wrote:
> On 01/25/2012 01:26 PM, Orit Wasserman wrote:
>> Implement Unsigned Little Endian Base 128.
>>
>>
>> +/* ULEB128 */
>> +int uleb128_encode_small(uint8_t *out, uint32_t n);
>> +int uleb128_decode_small(const uint8 *in, uint32_t *n);
>> +
>> #endif
>> di
Signed-off-by: Orit Wasserman
---
arch_init.c | 60 ++
migration.c | 10 +
migration.h |9
qapi-schema.json | 20 -
4 files changed, 97 insertions(+), 2 deletions(-)
diff --git a/arch_i
Add migration state to store XBRLE params (enablement and cache size).
In the outgoing migration check to see if the page is cached and
changed than send compressed page by using save_xbrle_page function.
In the incoming migration check to see if RAM_SAVE_FLAG_XBRLE is set
and decompress the page (
Signed-off-by: Orit Wasserman
---
arch_init.c | 24
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 34e4e60..1218306 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -300,6 +300,16 @@ static void cache_insert(unsigned long
On Wed, 2012-01-25 at 17:38 +0200, Michael S. Tsirkin wrote:
> On Wed, Jan 25, 2012 at 06:46:03PM +1300, Alexey Korolev wrote:
> > Hi,
> > In this post
> > http://lists.gnu.org/archive/html/qemu-devel/2011-12/msg03171.html I've
> > mentioned about the issues when 64Bit PCI BAR is present and 32bit
Standard VGA does not use vga_draw_cursor_line_* functions.
Move the template to cirrus_vga_template.h.
Signed-off-by: Blue Swirl
---
hw/cirrus_vga.c |9
hw/cirrus_vga_template.h | 102 ++
hw/vga_int.h | 13 --
hw/v
Instead of each target knowing or guessing the guest page size,
just pass the desired size of dirtied memory area.
Signed-off-by: Blue Swirl
---
arch_init.c |7 ---
exec-obsolete.h | 14 --
hw/framebuffer.c |9 +
hw/g364fb.c |3 ++-
hw/sm501.c
> > There is a declarative solution for this that I know of, a C++ class
> > definition ;-)
>
> So what's the reason not to go with one of the object-oriented,
> C-compatible languages GCC supports, like C++ or Objective-C/C++?
> (Objective-C has native reflection capabilities fwiw.)
I'd avoid Ob
I am working on extending coremu (parallel version of qemu).
Currently, the code cache in coremu is private, I am working towards
to make it shared by all cores. I think the add_tb_jump may not be
atomic.
Thanks
Xin
On Wed, Jan 25, 2012 at 11:22 AM, Peter Maydell
wrote:
> On 25 January 2012 15:
In this version, I discarded the iterative version for dirty getting.
With the last patch, VGA can be compiled in hwlib. However, the patch
(even unfinished) reveals strange effects, so some discussion would be
nice.
URL git://repo.or.cz/qemu/blueswirl.git
http://repo.or.cz/r/qemu/blu
Signed-off-by: Orit Wasserman
---
arch_init.c |5 +
migration.c |8
migration.h |4
savevm.c|9 ++---
sysemu.h|1 +
5 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 3a9b0e6..c7da4d7 100644
--- a/arch
Add LRU page caching mechanism.
The pages are stored in the cache ordered by their address.
Signed-off-by: Orit Wasserman
---
arch_init.c | 175 +++
1 files changed, 175 insertions(+), 0 deletions(-)
diff --git a/arch_init.c b/arch_init.c
This patch produces the following error when booting Solaris/SPARC:
WARNING: /iommu@0,1000/sbus@0,10001000/espdma@5,840/esp@5,880
(esp0):
data transfer overrun: current esp state:
esp:State=DATA Last State=DATA_DONE
esp:Latched stat=0x91 intr=0x10 fifo 0
QMP/HMP changes
Signed-off-by: Orit Wasserman
---
hmp-commands.hx | 21 +
qmp-commands.hx | 18 +++---
2 files changed, 24 insertions(+), 15 deletions(-)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index 3b7255d..daa8aae 100644
--- a/hmp-commands.hx
+++ b/
On Tue, Jan 24, 2012 at 13:05, Avi Kivity wrote:
> On 01/22/2012 03:06 PM, Blue Swirl wrote:
>> Let's compile Cirrus in hwlib.
>>
>> http://repo.or.cz/r/qemu/blueswirl.git
>>
>>
>
> Patches look fine (after fixing #2).
Thanks, I applied them.
> But please post patches using
> git-send-email, ot
Signed-off-by: Orit Wasserman
---
arch_init.c | 26 +++---
1 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 1218306..26312f6 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -550,6 +550,18 @@ static inline void *host_from_stream_o
When setting a TLB entry, we need to check if the TLB we're putting it in
actually supports the given size. According to the 2.06 PowerPC ISA, a
value that's out of range can either be redefined to something implementation
dependent or we can raise an illegal opcode exception. We do the latter.
Si
On Tue, Jan 24, 2012 at 19:32, Anthony Liguori wrote:
> This series makes qdev a proper Object and converts qdev's type inheritance to
> QOM inheritance.
>
> The first half of the series are manual cleanups/refactorings. The second
> half
> is mostly scripted conversion, separated out into revie
Thanks to Scott we now have an e500mc CPU description that works great with
KVM, but I have a personal dislike against targets that don't work emulated,
since their test coverage will be very low.
So this patch set implements TCG emulation for -cpu e500mc. I tested that it
works as expected agains
Am 24.01.2012 13:39, schrieb Peter Maydell:
> Instantiate the CLCD on the vexpress motherboard as well as one on
> the daughterboard -- the A15 daughterboard does not have a CLCD
> and so relies on the motherboard one.
>
> At the moment QEMU doesn't provide infrastructure for selecting
> which dis
On 01/25/2012 02:22 PM, Orit Wasserman wrote:
> On 01/25/2012 01:48 PM, Avi Kivity wrote:
>> On 01/25/2012 01:26 PM, Orit Wasserman wrote:
>>> Implement Unsigned Little Endian Base 128.
>>>
>>>
>>> +/* ULEB128 */
>>> +int uleb128_encode_small(uint8_t *out, uint32_t n);
>>> +int uleb128_decode_sma
Change XBZRLE cache size in MB (the size should be a poer of 2)
Signed-off-by: Orit Wasserman
---
hmp-commands.hx | 15 +++
hmp.c| 13 +
hmp.h|1 +
migration.c | 22 +-
migration.h |2 ++
qapi-schema.jso
Add migration capabiltes that can be queried by the management.
The managment can query to source and the destination in order to
verfiy both support some maigration capability (currently only XBZRLE).
Signed-off-by: Orit Wasserman
---
hmp.c| 18 ++
hmp.h
Change from v5:
1) Add migration capabilities
2) Use ULEB to encode run length
3) Do not send unmodified (dirty) page
3) Fix other patch comments
Using GCache or GHashTable requires allocating new buffer on every content
change,
so I decided to keep the simple cache implementation.
Todo :
Implement Unsigned Little Endian Base 128.
Signed-off-by: Orit Wasserman
---
migration.h |4
savevm.c| 26 ++
2 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/migration.h b/migration.h
index 372b066..50dec18 100644
--- a/migration.h
+++ b/mig
E500mc supports IVORs 36-41. Add them to the support mask. Drop SPE
support too.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- drop SPE IVOR
---
target-ppc/translate_init.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc
Am 24.01.2012 13:39, schrieb Peter Maydell:
> Add the vexpress-a15 machine, and the A-Series memory map it uses.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imend
Our code only knows IVORs up to 37. Add the new ones defined in ISA 2.06
from 38 - 42.
Signed-off-by: Alexander Graf
Reviewed-by: Andreas Färber
---
target-ppc/cpu.h|5 +
target-ppc/translate_init.c | 29 +++--
2 files changed, 20 insertions(+), 14
The msync instruction as defined today is only valid on 4xx cores, not
on e500 which also supports msync, but treats it the same way as sync.
Rename it to reflect that it's 4xx only.
Signed-off-by: Alexander Graf
---
target-ppc/translate.c |4 ++--
1 files changed, 2 insertions(+), 2 deleti
We might want to call the tlb check function without actually caring about
the real address resolution. Check if we really should write the value
back.
Signed-off-by: Alexander Graf
---
target-ppc/helper.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/target-ppc/he
Am 24.01.2012 13:39, schrieb Peter Maydell:
> Factor out daughterboard specifics into a data structure and
> daughterboard initialization function, in preparation for adding
> vexpress-a15 support.
>
> Signed-off-by: Peter Maydell
> ---
> hw/vexpress.c | 118
> +
On Tue, Jan 24, 2012 at 19:50, Vadim Rozenfeld wrote:
>
>
> - Original Message -
> From: "Blue Swirl"
> To: vroze...@redhat.com, "qemu-devel"
> Sent: Monday, January 23, 2012 10:10:51 PM
> Subject: [PATCH] hyperv: fix build on non-KVM hosts
>
> Signed-off-by: Blue Swirl
> ---
>
> Maybe
On Tue, Jan 24, 2012 at 18:29, Markus Armbruster wrote:
> Blue Swirl writes:
>
>> On Tue, Jan 24, 2012 at 15:57, Markus Armbruster wrote:
>>> Current master dies for me:
>>>
>>> $ upstream-qemu -nodefaults -S -m 384 -vnc :0 -device cirrus-vga
>>> RAMBlock "vga.vram" already registered, abort!
>>
On 2012-01-25 18:45, Alexander Graf wrote:
> On 01/25/2012 06:40 PM, Jan Kiszka wrote:
>> On 2012-01-25 18:33, Alexander Graf wrote:
>>> Commit 84b058d broke compilation for KVM on non-x86 targets, which
>>> don't have KVM_CAP_IRQ_ROUTING defined.
>>>
>>> Fix by not using the unavailable constant w
The e500 CPUs don't use 440's msync which falls on the same opcode IDs,
but instead use the real powerpc sync instruction. This is important,
since the invalid mask differs between the two.
Signed-off-by: Alexander Graf
---
target-ppc/translate.c |3 +--
target-ppc/translate_init.c |
When using MAV 2.0 TLB registers, we have another range of TLB registers
available to read the supported page sizes from.
Add SPR definitions for those and add a helper function that we can use
to receive such a bitmap even when using MAV 1.0.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h
On 01/25/2012 06:40 PM, Jan Kiszka wrote:
On 2012-01-25 18:33, Alexander Graf wrote:
Commit 84b058d broke compilation for KVM on non-x86 targets, which
don't have KVM_CAP_IRQ_ROUTING defined.
Fix by not using the unavailable constant when it's not around.
Signed-off-by: Alexander Graf
---
kv
On 2012-01-25 18:33, Alexander Graf wrote:
> Commit 84b058d broke compilation for KVM on non-x86 targets, which
> don't have KVM_CAP_IRQ_ROUTING defined.
>
> Fix by not using the unavailable constant when it's not around.
>
> Signed-off-by: Alexander Graf
> ---
> kvm-all.c |4
> 1 file
Our internal helpers to fetch TLB entries were not able to tell us
that an entry doesn't even exist. Pass an error out if we hit such
a case to not accidently pass beyond the TLB array.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |4
target-ppc/helper.c|3 +++
targe
Commit 84b058d broke compilation for KVM on non-x86 targets, which
don't have KVM_CAP_IRQ_ROUTING defined.
Fix by not using the unavailable constant when it's not around.
Signed-off-by: Alexander Graf
---
kvm-all.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/kvm-
The PowerPC 2.06 BookE ISA defines an opcode called "tlbilx" which is used
to flush TLB entries. It's the recommended way of flushing in virtualized
environments.
So far we got away without implementing it, but Linux for e500mc uses this
instruction, so we better add it :).
Signed-off-by: Alexand
We can have TLBs that only support a single page size. This is defined
by the absence of the AVAIL flag in TLBnCFG. If this is the case, we
currently write invalid size info into the TLB, but override it on
internal fault.
Let's move the check over to tlbwe, so we don't have the AVAIL check in
the
On 25 January 2012 17:04, Andreas Färber wrote:
> Am 25.01.2012 17:35, schrieb Peter Maydell:
>>
>> You need to bump .version_id and make your new fields
>> VMSTATE_UINT32(write_word_prev_offset, lan9118_state, 2),
>
> VMSTATE_UINT32_V(write_word_prev_offset, lan9118_state, 2),
Doh, yes.
-
Introduce the KVM-specific machine option kvm_shadow_mem. It allows to
set a custom shadow MMU size for the virtual machine. This is useful for
stress testing e.g.
Only x86 supports this for now, but it is in principle a generic
concept for all targets with shadow MMUs.
Signed-off-by: Jan Kiszka
Am 25.01.2012 17:35, schrieb Peter Maydell:
> On 20 January 2012 10:53, Evgeny Voevodin wrote:
>> @@ -294,6 +304,14 @@ static const VMStateDescription vmstate_lan9118 = {
>> VMSTATE_INT32(rxp_offset, lan9118_state),
>> VMSTATE_INT32(rxp_size, lan9118_state),
>> VMSTATE_INT3
On 01/25/2012 05:34 PM, Artyom Tarasenko wrote:
This patch produces the following error when booting Solaris/SPARC:
WARNING: /iommu@0,1000/sbus@0,10001000/espdma@5,840/esp@5,880
(esp0):
data transfer overrun: current esp state:
esp:State=DATA Last State=DATA_DONE
Am 24.01.2012 13:39, schrieb Peter Maydell:
> Pull the addresses used for mapping motherboard peripherals into
> memory out into a table. This will allow us to simply provide a
> second table to implement the "Cortex-A Series" memory map used by
> the A15 variant of Versatile Express, as well as th
On 20 January 2012 10:53, Evgeny Voevodin wrote:
> @@ -294,6 +304,14 @@ static const VMStateDescription vmstate_lan9118 = {
> VMSTATE_INT32(rxp_offset, lan9118_state),
> VMSTATE_INT32(rxp_size, lan9118_state),
> VMSTATE_INT32(rxp_pad, lan9118_state),
> + VMSTATE_UINT
On 25 January 2012 15:55, Xin Tong wrote:
> The segfault is caused by jumping to the middle of an instruction. so
> i want to know which TB jumps here.
(a) Assuming it doesn't take too long to get there, you should
be able to get this information by turning on the debug log
via -d whatever. If it
Am 24.01.2012 13:39, schrieb Peter Maydell:
> Add a model of the Cortex-A15 memory mapped private peripheral
> space. This is fairly simple because the only memory mapped
> bit of the A15 is the GIC.
>
> Note that we don't currently model a VGIC and therefore don't
> map the VGIC related bits of t
In some cases initializing the alarm timers can lead to non-negligable
overhead from programs that link against qemu-tool.o. At least,
setting a max-resolution WinMM alarm timer via mm_start_timer() (the
current default for Windows) can increase the "tick rate" on Windows
OSs and affect frequency s
Recently commands where introduced on the mailing that involved adding
commands to the guest agent that could potentially break older versions
of QEMU. While it's okay to expect that qemu-ga can be updated to support
newer host features, it's unrealistic to require a host to be updated to
support q
> I have a bug, it segfaults when executing a translation blocks. when i
> disable block chaining, the bug disappears. However, with block
> chaining, i do not know which translation block jumps to the code
> which caused the segfault. I want to reserve a register and use it to
> record the last t
On 01/24/2012 11:47 PM, ronnie sahlberg wrote:
> Read from an arbitrary filedescriptor inherited from the parent process :
> 9 vnc=127.0.0.1:0 -drive file=iscsi://127.0.0.1/iqn.ronnie.test/1
> -readconfig /proc/self/fd/9
That requires the existence of procfs, which is not portable (although
it doe
Here's the latest target-arm pullreq. It includes Mark's fix for
config_base_register, which is in turn a dependency of the arm-devs
pullreq I'm about to send out, and which I'd like to get in before
Anthony's QOM patchset lands and invalidates it :-)
Please pull.
-- PMM
The following changes s
Add a dummy implementation of the cp15 registers for the generic
timer (found in the Cortex-A15), just sufficient for Linux to
decide that it can't use it. This requires at least CNTP_CTL and
CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14.
Reviewed-by: Andreas Färber
Signed-off-by: Pete
Add a definition of a Cortex-A15 CPU. Note that for the moment we do
not implement any of:
* Large Physical Address Extensions (LPAE)
* Virtualization Extensions
* Generic Timer
* TrustZone (this is also true of our existing Cortex-A9 model, etc)
This CPU model is sufficient to boot a Linux ke
From: Mark Langsdorf
Long term, the config_base_register will be a QDM parameter. In the
meantime, models that use it need to be able to preserve it across
cpu_reset() calls.
Signed-off-by: Mark Langsdorf
Signed-off-by: Peter Maydell
---
target-arm/helper.c |3 +++
1 files changed, 3 inse
The segfault is caused by jumping to the middle of an instruction. so
i want to know which TB jumps here.
Thanks
Xin
On Wed, Jan 25, 2012 at 10:54 AM, Xin Tong wrote:
> I have a bug, it segfaults when executing a translation blocks. when i
> disable block chaining, the bug disappears. However
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