On Mon, Jul 25, 2011 at 1:40 PM, Stefan Hajnoczi wrote:
> On Mon, Jul 25, 2011 at 5:25 AM, Zhi Yong Wu wrote:
>> On Fri, Jul 22, 2011 at 6:54 PM, Stefan Hajnoczi wrote:
>>> On Fri, Jul 22, 2011 at 10:20 AM, Zhi Yong Wu
>>> wrote:
+static void bdrv_block_timer(void *opaque)
+{
+
On 07/25/2011 03:45 AM, Anthony Liguori wrote:
The getters lack type safety though which is unfortunate. That said, I
guess it's the best we can do with qdev.
You can assert on type mismatch though, just like with setters.
Paolo
On Wed, Jul 13, 2011 at 06:37:05PM +0530, Supriya Kannery wrote:
> Index: qemu/block.c
> ===
> --- qemu.orig/block.c
> +++ qemu/block.c
> @@ -651,6 +651,40 @@ unlink_and_fail:
> return ret;
> }
>
> +int bdrv_reopen(BlockDriverSt
On Mon, Jul 25, 2011 at 5:25 AM, Zhi Yong Wu wrote:
> On Fri, Jul 22, 2011 at 6:54 PM, Stefan Hajnoczi wrote:
>> On Fri, Jul 22, 2011 at 10:20 AM, Zhi Yong Wu
>> wrote:
>>> +static void bdrv_block_timer(void *opaque)
>>> +{
>>> + BlockDriverState *bs = opaque;
>>> + BlockQueue *queue = bs
On Fri, Jul 22, 2011 at 6:54 PM, Stefan Hajnoczi wrote:
> On Fri, Jul 22, 2011 at 10:20 AM, Zhi Yong Wu
> wrote:
>> +static void bdrv_block_timer(void *opaque)
>> +{
>> + BlockDriverState *bs = opaque;
>> + BlockQueue *queue = bs->block_queue;
>> + uint64_t intval = 1;
>> +
>> + whil
Signed-off-by: Anthony Liguori
---
devices/Makefile |2 +-
devices/pin.c | 69
include/qemu/pin.h | 28 +
3 files changed, 98 insertions(+), 1 deletions(-)
create mode 100644 devices/pin.c
create mode 100644
QOM provides a unified model for separating modules into independently buildable
components. To fully take advantage of this, we need a bit more make
infrastructure that lets us describe these modules and their dependencies.
Ultimately this will enable us to support tristate modules that can be de
This introduces two classed, SocketCharDriver and SocketServer.
SocketCharDriver implements the generic logic for all socket based transports.
SocketServer implements the necessary functionality for server-based socket
transports.
Unlike the previous socket CharDriverState, there is no magic overl
Right now this uses the preprocessor and is vomit inducing. I think a python
generator is in the near future.
Signed-off-by: Anthony Liguori
---
include/qemu/plug-proptypes.h | 29 +-
include/qemu/plug.h |4 +-
qom/plug-proptypes.c | 119 +++
Signed-off-by: Anthony Liguori
---
monitor.c | 25 +
qmp-commands.hx |9 +
2 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/monitor.c b/monitor.c
index 8406b5b..f17eb3a 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1069,6 +1069,31 @@ static
Signed-off-by: Anthony Liguori
---
monitor.c | 35 +++
qmp-commands.hx |9 +
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/monitor.c b/monitor.c
index f17eb3a..1937e9f 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1094,6 +1094,41
On 07/24/2011 04:35 PM, Andreas Färber wrote:
Am 24.07.2011 um 20:57 schrieb Anthony Liguori:
On 07/24/2011 01:45 PM, Paolo Bonzini wrote:
On 07/16/2011 04:39 PM, Anthony Liguori wrote:
Instead of checking for a port assignment, couldn't we do a device tree
transversal and look for isa-seria
Signed-off-by: Anthony Liguori
---
monitor.c | 20
qmp-commands.hx |9 +
2 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/monitor.c b/monitor.c
index e53808a..549251a 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1069,6 +1069,26 @@ static int d
Signed-off-by: Anthony Liguori
---
monitor.c | 49 +
qmp-commands.hx | 27 +++
2 files changed, 76 insertions(+), 0 deletions(-)
diff --git a/monitor.c b/monitor.c
index 718935b..8406b5b 100644
--- a/monitor.c
+++
The Plug class is the base class for all objects. Plugs implement properties
using the existing Visitor framework. This allows for very complex properties
to be implemented.
Plugs also implement life cycle management by containing a realized state. An
object isn't fully constructed until its re
This patch implements the basic type system used by QEMU Object Model. This
infrastructure supports the registration of classes and instantiation of
objects through a generic factory interface. Classes support polymophism and
single inheritance.
Interfaces can also be used to approximate multipl
Signed-off-by: Zhi Yong Wu
---
Makefile.objs |2 +-
block.c | 248 +
block.h |1 -
block/blk-queue.c | 99 +
block/blk-queue.h | 73
block_int.h | 21 +
blockd
The main goal of the patch is to effectively cap the disk I/O speed or counts
of one single VM.
It is only one draft, so it unavoidably has some drawbacks, if you catch them,
please let me know.
The patch will mainly introduce one global timer and one block queue for each
I/O limits enabled dri
On 07/24/2011 06:47 PM, Anthony Liguori wrote:
> On 07/24/2011 02:00 PM, Richard Henderson wrote:
>> On 07/24/2011 11:56 AM, Anthony Liguori wrote:
>>> What is returned by totally unregistered MMIO is defined by the
>>> chipset. What's returned by an empty space in the MMIO space of a
>>> device is
Plug properties types allow composition within the object model. A plug is an
object that is directly created from the current object, usually using the same
memory as the current object.
Realize state is propagated to any plugs assocatied with the object. Lifecycle
is also propagated such that
The CharDriver type replaces the CharDriverState in QEMU today. Here's how
everything matches up:
1) qemu_chr_open() no longer exists. This function used to act as a factory
and used parsing of the filename to determine which type to create. A newer
version using QemuOpts was introduce
Hi,
This series is the rough beginnings of the QEMU Object Model. This is basically
qdev generalized on steroids.
This series includes the core infrastructure, a strawman Device type, and
the beginnings of the conversion of CharDriverState. This is in a rougher
state than I would like it to be
On 07/24/2011 12:21 PM, Blue Swirl wrote:
On Sun, Jul 24, 2011 at 1:23 AM, Anthony Liguori wrote:
On 07/23/2011 04:25 PM, Blue Swirl wrote:
Avoid this warning:
CCslirp/ip_icmp.o
/src/qemu/slirp/ip_icmp.c: In function 'icmp_receive':
/src/qemu/slirp/ip_icmp.c:418:5: error: passing argum
On 07/24/2011 02:00 PM, Richard Henderson wrote:
On 07/24/2011 11:56 AM, Anthony Liguori wrote:
What is returned by totally unregistered MMIO is defined by the
chipset. What's returned by an empty space in the MMIO space of a
device is device specific.
It's one and the same here, it's the chip
This lets you explore the QEMU Object Model with a filesystem like interface.
Signed-off-by: Anthony Liguori
---
scripts/qsh | 178 +++
1 files changed, 178 insertions(+), 0 deletions(-)
create mode 100755 scripts/qsh
diff --git a/script
This is used primarly by QMP.
Signed-off-by: Anthony Liguori
---
chrdrv/Makefile |1 +
chrdrv/Qconfig|7 +
chrdrv/memchr.c | 70 +
include/qemu/memchr.h | 46
4 files changed, 124
This is roughly equivalent to -chardev socket,path=PATH,server=on
Signed-off-by: Anthony Liguori
---
chrdrv/Makefile|1 +
chrdrv/Qconfig |7 +++
chrdrv/unixsrv.c | 104
include/qemu/unixsrv.h | 24 +++
4 fi
This is roughly equivalent to -chardev socket,path=PATH,port=PORT,server=on
Signed-off-by: Anthony Liguori
---
chrdrv/Makefile |1 +
chrdrv/Qconfig|7 ++
chrdrv/tcpsrv.c | 203 +
include/qemu/tcpsrv.h | 40 ++
Device is meant to replace DeviceState as the root class for the device model.
This is included here merely as a RFC. Device adds a couple of useful features.
1) Default hard reset. Device will literally call finalize on the object and
then reinitialize it in place. This means that most devi
Signed-off-by: Anthony Liguori
---
monitor.c | 35 +++
qmp-commands.hx |9 +
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/monitor.c b/monitor.c
index 47011dd..e53808a 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1162,6 +1162,41
Signed-off-by: Anthony Liguori
---
monitor.c | 33 +
qmp-commands.hx |9 +
2 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/monitor.c b/monitor.c
index 1937e9f..47011dd 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1129,6 +1129,39 @@
Sockets form back links in the object graph. From the object's perspective,
a socket just looks like a pointer to an object. The socket property type
provides a generic mechanism to set those pointers to other objects while
providing strong type checking.
It's also useful to lock sockets, partic
Plug depends on QAPI and in order to express that dependency, QAPI needs to use
the Qconfig build system. Right now, QAPI is only built for guest agent, but
this changes the generic build to now include QAPI.
Signed-off-by: Anthony Liguori
---
Makefile | 10 ++
Makefile.objs |
Am 24.07.2011 um 20:57 schrieb Anthony Liguori:
On 07/24/2011 01:45 PM, Paolo Bonzini wrote:
On 07/16/2011 04:39 PM, Anthony Liguori wrote:
Instead of checking for a port assignment, couldn't we do a device
tree
transversal and look for isa-serial devices? We could then look at
the
iobas
Alexander Graf a écrit :
On 21.12.2010, at 21:01, Andreas Färber wrote:
From: Hervé Poussineau
v1:
* Coding style fixes.
Signed-off-by: Hervé Poussineau
Cc: Alexander Graf
Signed-off-by: Andreas Färber
---
Hello Alex,
Seeing the discussions about Leon3, is this the way to go for ppc?
On 07/24/2011 11:56 AM, Anthony Liguori wrote:
> What is returned by totally unregistered MMIO is defined by the
> chipset. What's returned by an empty space in the MMIO space of a
> device is device specific.
It's one and the same here, it's the chipset I'm implementing.
> What does your device
On 07/24/2011 01:45 PM, Paolo Bonzini wrote:
On 07/16/2011 04:39 PM, Anthony Liguori wrote:
Instead of checking for a port assignment, couldn't we do a device tree
transversal and look for isa-serial devices? We could then look at the
iobase property to figure out which serial device is configu
On 07/24/2011 11:42 AM, Richard Henderson wrote:
On 07/24/2011 06:28 AM, Anthony Liguori wrote:
On 07/23/2011 02:17 PM, Richard Henderson wrote:
Signed-off-by: Richard Henderson
Why?
So that I can write i/o functions like this:
switch (addr) {
case 0: ...
case 64: ...
case 128:
On 07/16/2011 04:39 PM, Anthony Liguori wrote:
Instead of checking for a port assignment, couldn't we do a device tree
transversal and look for isa-serial devices? We could then look at the
iobase property to figure out which serial device is configured.
Thanks for applying it as is---BTW, I
On 07/24/2011 12:28 PM, Blue Swirl wrote:
On Sun, Jul 24, 2011 at 2:16 AM, Michael Roth wrote:
QAPI requires python to generate code. Check for python during
configuration and allow python to be specified manually.
Signed-off-by: Michael Roth
---
Makefile | 12 ++--
configure |
- TLB opcode group;
- region protection option (ISA, 4.6.3);
- region translation option (ISA, 4.6.4);
- MMU option (ISA, 4.6.5).
Cache control attribute bits are not used by this implementation.
Signed-off-by: Max Filippov
---
target-xtensa/cpu.h | 56 -
target-xtensa/helper.c
See ISA, 4.7.1 for details.
Physical registers and currently visible window are separate fields in
CPUEnv. Only current window is accessible to TCG. On operations that
change window base helpers copy current window to and from physical
registers.
Window overflow check described in 4.7.1.3 is in s
QAPI will require glib/python, but for now the guest agent is the only
user. For now, make these dependencies an explicit guest agent one, and
give users the option to disable it if need be.
Once QAPI is adopted in core QEMU code, we would basically revert this
patch.
Signed-off-by: Michael Roth
QAPI requires python to generate code. Check for python during
configuration and allow python to be specified manually.
Signed-off-by: Michael Roth
---
Makefile | 12 ++--
configure | 13 +
2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/Makefile b/Makefi
Specific xtensa processor overlay for GDB contains register map in
the gdb/xtensa-config.c. This description is used by the GDB to e.g.
parse 'g' response packets and it may be reused in the qemu's gdbstub
(only XTREG definitions for non-pseudoregisters are needed).
Currently mainline GDB does not
All operations in this group are no-ops, because cache ought to be
transparent to applications. However cache may be abused, then we'll
need to actually implement these opcodes.
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 95 -
1 file
Sample board and sample CPU core are used for debug and may be used for
development of custom SoC emulators.
This board has two fixed size memory regions for DTCM and ITCM and
variable length SRAM region.
Signed-off-by: Max Filippov
---
Makefile.target|1 +
hw/xtensa_sample.c | 105 +++
Signed-off-by: Max Filippov
---
target-xtensa/cpu.h | 53 -
target-xtensa/helper.c|1 +
target-xtensa/translate.c | 29
3 files changed, 77 insertions(+), 6 deletions(-)
diff --git a/target-xtensa/cpu.h b/targ
Signed-off-by: Max Filippov
---
hw/xtensa_sample.c|1 +
target-xtensa/cpu.h |2 ++
target-xtensa/translate.c |7 +++
3 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/hw/xtensa_sample.c b/hw/xtensa_sample.c
index 9f7733b..c2ad48a 100644
--- a/hw/xtensa_
- mark privileged opcodes with ring check;
- make debug exception on exception handler entry.
Signed-off-by: Max Filippov
---
cpu-exec.c|6 +++
target-xtensa/cpu.h | 67
target-xtensa/helper.c| 37 +++-
target-xtensa/help
Special Registers hold the majority of the state added to the processor
by the options. See ISA, 5.3 for details.
User Registers hold state added in support of designer's TIE and in some
cases of options that Tensilica provides. See ISA, 5.4 for details.
Only registers mapped in sregnames or ureg
Group SNM0 (indirect jumps and calls).
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 43 +++
1 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index c6ebb3d..400c995 100644
- base + offset load/store operations for 1/2/4 byte values;
- cache operations (not implemented);
- multiprocessor synchronization operations.
Signed-off-by: Max Filippov
---
target-xtensa/cpu.h |1 +
target-xtensa/translate.c | 89 +
2 fi
Hi,
On 07/22/2011 02:40 PM, Gerd Hoffmann wrote:
ACK.
Another option would be to not call the state callback for the vdagent
subtype from spice-server, because like you say it ignores the continued
communication between the agent and the server. Then you could remove
the subtype check.
We can
- access to Special Registers (wsr, rsr);
- access to User Registers (wur, rur);
- misc. operations option (value clamp, sign extension, min, max);
- conditional moves.
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 161 +
1 files changed
NEG and ABS are the only members of RT0 group.
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 19 +++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 2ff5838..dcbc0ae 100644
--- a/target-xt
All operations in this group are no-ops, because there are no delayed
side effects.
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 31 ++-
1 files changed, 30 insertions(+), 1 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translat
- ST1: SAR (shift amount special register) manipulation, NSA(U);
- RST1: shifts, 16-bit multiplication.
Signed-off-by: Max Filippov
---
v1 -> v2 changes:
- fix nsa helper implementation;
---
target-xtensa/cpu.h |4 +
target-xtensa/helpers.h |2 +
target-xtensa/op_helper.c | 14
From: Jan Kiszka
Device models rely on the core invoking their reset handlers after init.
We do this in the cold-plug case, but so far we miss this step after
hot-plug.
Signed-off-by: Jan Kiszka
---
Changes in v2:
- move reset to qdev_init in case the device is created by the
hot-plugged o
On Sun, Jul 24, 2011 at 2:16 AM, Michael Roth wrote:
> QAPI requires python to generate code. Check for python during
> configuration and allow python to be specified manually.
>
> Signed-off-by: Michael Roth
> ---
> Makefile | 12 ++--
> configure | 13 +
> 2 files chan
On Sun, Jul 24, 2011 at 1:23 AM, Anthony Liguori wrote:
> On 07/23/2011 04:25 PM, Blue Swirl wrote:
>>
>> Avoid this warning:
>> CC slirp/ip_icmp.o
>> /src/qemu/slirp/ip_icmp.c: In function 'icmp_receive':
>> /src/qemu/slirp/ip_icmp.c:418:5: error: passing argument 2 of 'recv'
>> from incompa
Add myself as target-xtensa and DC232B maintainer.
Signed-off-by: Max Filippov
---
MAINTAINERS | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6115e4e..c7395df 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -115,6 +115,12 @@ M:
See ISA, 4.4.3 for details.
Vector addresses recorded in core configuration are absolute values that
correspond to default VECBASE value.
Signed-off-by: Max Filippov
---
target-xtensa/cpu.h |2 ++
target-xtensa/helper.c| 18 --
target-xtensa/translate.c |1 +
This is Diamond 232L Standard Core Rev.B (LE).
Signed-off-by: Max Filippov
---
Makefile.target |1 +
hw/xtensa_dc232b.c| 112
target-xtensa/gdb-config-dc232b.c | 261 +
target-xtensa/helper.c
See ISA, 4.4.4 for details.
Correct (aligned as per ISA) address for unaligned access is generated
in case this option is not enabled.
Signed-off-by: Max Filippov
---
v1 -> v2 changes:
- use ALIGNED_ONLY to handle unaligned memory access;
---
target-xtensa/helper.c|4 ++-
target-xtensa/
See ISA, 4.7.1.3 for details.
Window check is inserted before commands that push "used register
watermark" beyond its current level. Used register watermark is reset on
instructions that change WINDOW_BASE/WINDOW_START SRs.
Signed-off-by: Max Filippov
---
v1 -> v2 changes:
- dc->used_window is u
See ISA, 4.4.6 (interrupt option), 4.4.7 (high priority interrupt
option) and 4.4.8 (timer interrupt option) for details.
Signed-off-by: Max Filippov
---
v1 -> v2 changes:
- don't reset env->halted in xtensa_advance_ccount;
- clean up cases in the do_interrupt switch;
---
hw/xtensa_pic.c
See ISA, 4.3.2 for details.
Operations that change LEND SR value invalidate TBs at the old and at
the new LEND. LEND value at TB compilation time is considered constant
and loop instruction is generated based on this value.
Invalidation may be avoided for the TB at the old LEND address, since
loo
Tensilica iss provides support for applications running in freestanding
environment through SIMCALL command. It is used by Tensilica libc to
access argc/argv, for file I/O, etc.
Note that simcalls that accept buffer addresses expect virtual addresses.
Signed-off-by: Max Filippov
---
Makefile.ta
See ISA, 4.3.3 for details.
TB flag XTENSA_TBFLAG_LITBASE is used to track enable bit of LITBASE SR.
Signed-off-by: Max Filippov
---
v1 -> v2 changes:
- do not encode LITBASE value into TB;
---
target-xtensa/cpu.h |6 ++
target-xtensa/helper.c|1 +
target-xtensa/translate.
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 60 -
1 files changed, 59 insertions(+), 1 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 1fe212d..52a76e1 100644
--- a/target-xtensa/translate.c
+++ b
Reserved opcodes must generate illegal instruction exception. Usually
they signal emulation quality problems.
Not implemented opcodes are good to see.
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 110 -
1 files changed, 109 insertions(+
- BZ (comparison to zero);
- BI0 (comparison to signed immediate);
- BI1 (comparison to unsigned immediate);
- B (two registers comparison, bit sets comparison);
- BEQZ.N/BNEZ.N (narrow comparison to zero).
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 164
Instructions with op0 >= 8 are 2 bytes long, others are 3 bytes long.
Signed-off-by: Max Filippov
---
target-xtensa/translate.c | 54 +
1 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translat
Set up disas_xtensa_insn switch structure, mark required options on high
level groups. Implement arithmetic/bit logic/jump/call0.
Implement code generation loop with single step/breakpoint checking.
Signed-off-by: Max Filippov
---
target-xtensa/cpu.h | 67 +++
target-xtensa/helper.c
Signed-off-by: Max Filippov
---
configure| 12 +++-
default-configs/xtensa-softmmu.mak |1 +
default-configs/xtensaeb-softmmu.mak |1 +
3 files changed, 13 insertions(+), 1 deletions(-)
create mode 100644 default-configs/xtensa-softmmu.mak
create
Signed-off-by: Max Filippov
---
Makefile.target |2 +
arch_init.c |2 +
arch_init.h |1 +
cpu-exec.c|2 +
elf.h |2 +
hw/xtensa_pic.c | 38 ++
target-xtensa/cpu.h | 95
This series adds support for Tensilica Xtensa target.
Port status: Linux for DC232B works in the qemu.
Not implemented xtensa options: MAC16, floating point coprocessor,
boolean option, cache option, debug option.
v1 -> v2 changes:
- extract PS register and access control into separate patch;
From: Jan Kiszka
Device models rely on the core invoking their reset handlers after init.
We do this in the cold-plug case, but so far we miss this step after
hot-plug.
Signed-off-by: Jan Kiszka
---
This is also one piece in the puzzle of getting CPU hot-plug work.
hw/qdev.c |3 +++
1 fi
On 07/24/2011 06:28 AM, Anthony Liguori wrote:
> On 07/23/2011 02:17 PM, Richard Henderson wrote:
>> Signed-off-by: Richard Henderson
>
> Why?
So that I can write i/o functions like this:
switch (addr) {
case 0: ...
case 64: ...
case 128: ...
...
default:
unassigned_mem_readl(...
On Sun, 24 Jul 2011, G?ran Weinholt wrote:
> Multiboot images can specify a bss segment. The boot loader must clear
> the memory of the bss and ensure that no modules or structures are
> allocated inside it. Several fields are provided in the Multiboot
> header that were previously not used proper
Multiboot images can specify a bss segment. The boot loader must clear
the memory of the bss and ensure that no modules or structures are
allocated inside it. Several fields are provided in the Multiboot
header that were previously not used properly. The header is now used
to determine how much dat
Alexander Graf writes:
> On 24.07.2011, at 12:14, Göran Weinholt wrote:
>
>> Multiboot images can specify a bss segment. The boot loader must clear
>> the memory of the bss and ensure that no modules or structures are
>> allocated inside it. Several fields are provided in the Multiboot
>> header
On 07/23/2011 02:17 PM, Richard Henderson wrote:
Signed-off-by: Richard Henderson
Why?
Regards,
Anthony Liguori
---
cpu-common.h |7 +++
exec.c | 12 ++--
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/cpu-common.h b/cpu-common.h
index 44b04b3..7
On 07/24/2011 04:47 AM, Alexander Graf wrote:
These arguments all apply to any possible option. Why not a grep target? Why
not a cut or less target?
Because they don't make sense.
Neither does tee :-)
As long as the tee target is reasonably isolated, I don't think it'd clutter
the cha
On Fri, Jul 22, 2011 at 8:00 PM, Brad wrote:
> *sigh* This was some pretty sloppy work that was commited with very little
> testing. The QAPI stuff that was commited also needs Python
> to build and no appropriate checks were added to the configure script
> to check for its presence and to allow t
On 24.07.2011, at 12:14, Göran Weinholt wrote:
> Multiboot images can specify a bss segment. The boot loader must clear
> the memory of the bss and ensure that no modules or structures are
> allocated inside it. Several fields are provided in the Multiboot
> header that were previously not used p
On 2011-07-24 13:04, Stefan Weil wrote:
> Am 24.07.2011 12:12, schrieb Jan Kiszka:
>> From: Jan Kiszka
>>
>> Not all (didn't find any) mingw32 cross-toolchains ship a binutils-devel
>> package, thus lack libiberty.a. According to 08f3896a, -liberty is only
>> needed for getopt when building for 64
I have the same exact problem on MIPSel host as well.
Tried Qemu 0.14.1 and git from 110724.
Trying to run something from bash gives fork: Invalid argument.
strace gives clone(18874385,0,0,0,1084164376,1082144312) = -1 errno=22 (Invalid
argument)
There is no alignment switches on this CPU.
So, i
Am 24.07.2011 12:12, schrieb Jan Kiszka:
From: Jan Kiszka
Not all (didn't find any) mingw32 cross-toolchains ship a binutils-devel
package, thus lack libiberty.a. According to 08f3896a, -liberty is only
needed for getopt when building for 64 bit. Test for the availability
of a getopt implementa
Multiboot images can specify a bss segment. The boot loader must clear
the memory of the bss and ensure that no modules or structures are
allocated inside it. Several fields are provided in the Multiboot
header that were previously not used properly. The header is now used
to determine how much dat
From: Jan Kiszka
Not all (didn't find any) mingw32 cross-toolchains ship a binutils-devel
package, thus lack libiberty.a. According to 08f3896a, -liberty is only
needed for getopt when building for 64 bit. Test for the availability
of a getopt implementation and only pull in libiberty when linkin
On 23.07.2011, at 21:11, Anthony Liguori wrote:
> On 07/23/2011 01:31 PM, Alexander Graf wrote:
>>
>> On 23.07.2011, at 17:23, Anthony Liguori wrote:
>>
>>> On 07/14/2011 03:58 AM, Chunyan Liu wrote:
Add "tee" backend to char device. It could be used as follows:
-serial tee:filepa
On 14.07.2011, at 10:58, Chunyan Liu wrote:
> Add "tee" backend to char device. It could be used as follows:
>-serial tee:filepath,pty
>-chardev tee,tee_fpath=path,tee_backend=pty,,path=path,,[mux=on|off]
> With "tee" option, "pty" output would be duplicated to filepath.
> Related thread:
On 21.12.2010, at 21:01, Andreas Färber wrote:
> From: Hervé Poussineau
>
> v1:
> * Coding style fixes.
>
> Signed-off-by: Hervé Poussineau
> Cc: Alexander Graf
> Signed-off-by: Andreas Färber
> ---
>
> Hello Alex,
>
> Seeing the discussions about Leon3, is this the way to go for ppc? Is
Hi!
I am a 38 year old man from Sweden making a new Atari project called
EarthOS.
The project is not yet started, and I am looking around for people to work
with me, and program doing work at their spare time so to speak.
This is meant to be a new operating system with similarities to mint
multito
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