[Qemu-devel] [PATCH 06/26] Correct ppc popcntb logic, implement popcntw and popcntd

From: David Gibson qemu already includes support for the popcntb instruction introduced in POWER5 (although it doesn't actually allow you to choose POWER5). However, the logic is slightly incorrect: it will generate results truncated to 32-bits when the CPU is in 32-bit mode. This is not normal

[Qemu-devel] [PATCH 24/26] Implement PAPR virtual SCSI interface (ibmvscsi)

This patch implements the infrastructure and hypercalls necessary for the PAPR specified Virtual SCSI interface. This is the normal method for providing (virtual) disks to PAPR partitions. Signed-off-by: Ben Herrenschmidt Signed-off-by: David Gibson --- Makefile.target |2 +- hw/ppc-viosr

[Qemu-devel] [PATCH 22/26] Implement sPAPR Virtual LAN (ibmveth)

This patch implements the PAPR specified Inter Virtual Machine Logical LAN; that is the virtual hardware used by the Linux ibmveth driver. Signed-off-by: Paul Mackerras Signed-off-by: David Gibson --- Makefile.target |2 +- hw/spapr.c | 21 +++- hw/spapr_llan.c | 476 +++

[Qemu-devel] [PATCH 25/26] Add a PAPR TCE-bypass mechanism for the pSeries machine

From: Ben Herrenschmidt Usually, PAPR virtual IO devices use a virtual IOMMU mechanism, TCEs, to mediate all DMA transfers. While this is necessary for some sorts of operation, it can be complex to program and slow for others. This patch implements a mechanism for bypassing TCE translation, tre

[Qemu-devel] [PATCH 16/26] Implement hcall based RTAS for pSeries machines

On pSeries machines, operating systems can instantiate "RTAS" (Run-Time Abstraction Services), a runtime component of the firmware which implements a number of low-level, infrequently used operations. On logical partitions under a hypervisor, many of the RTAS functions require hypervisor privilege

[Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized interrupt controller (xics)

PAPR defines an interrupt control architecture which is logically divided into ICS (Interrupt Control Presentation, each unit is responsible for presenting interrupts to a particular "interrupt server", i.e. CPU) and ICS (Interrupt Control Source, each unit responsible for one or more hardware inte

[Qemu-devel] [PATCH 23/26] Implement PAPR CRQ hypercalls

From: Ben Herrenschmidt This patch implements the infrastructure and hypercalls necessary for the PAPR specified CRQ (Command Request Queue) mechanism. This general request queueing system is used by many of the PAPR virtual IO devices, including the virtual scsi adapter. Signed-off-by: Ben Her

[Qemu-devel] [PATCH 13/26] Start implementing pSeries logical partition machine

This patch adds a "pseries" machine to qemu. This aims to emulate a logical partition on an IBM pSeries machine, compliant to the "PowerPC Architecture Platform Requirements" (PAPR) document. This initial version is quite limited, it implements a basic machine and PAPR hypercall emulation. So fa

[Qemu-devel] [PATCH 17/26] Implement assorted pSeries hcalls and RTAS methods

This patch adds several small utility hypercalls and RTAS methods to the pSeries platform emulation. Specifically: * 'display-character' rtas call This just prints a character to the console, it's occasionally used for early debug of the OS. The support includes a hack to make this RTAS call re

[Qemu-devel] [PATCH 21/26] Implement TCE translation for sPAPR VIO

From: Ben Herrenschmidt This patch implements the necessary infrastructure and hypercalls for sPAPR's TCE (Translation Control Entry) IOMMU mechanism. This is necessary for all virtual IO devices which do DMA (i.e. nearly all of them). Signed-off-by: Ben Herrenschmidt Signed-off-by: David Gibs

[Qemu-devel] [PATCH 20/26] Add (virtual) interrupt to PAPR virtual tty device

Now that we have implemented the PAPR "xics" virtualized interrupt controller, we can add interrupts in PAPR VIO devices. This patch adds interrupt support to the PAPR virtual tty/console device. Signed-off-by: David Gibson --- hw/spapr.c |6 -- hw/spapr_vio.h |3 ++- hw/spapr_v

[Qemu-devel] [PATCH 12/26] Add POWER7 support for ppc

This adds emulation support for the recent POWER7 cpu to qemu. It's far from perfect - it's missing a number of POWER7 features so far, including any support for VSX or decimal floating point instructions. However, it's close enough to boot a kernel with the POWER7 PVR. Signed-off-by: David Gibs

[Qemu-devel] [PATCH 14/26] Implement the bus structure for PAPR virtual IO

This extends the "pseries" (PAPR) machine to include a virtual IO bus supporting the PAPR defined hypercall based virtual IO mechanisms. So far only one VIO device is provided, the vty / vterm, providing a full console (polled only, for now). Signed-off-by: David Gibson --- Makefile.target |

[Qemu-devel] [PATCH 19/26] Add PAPR H_VIO_SIGNAL hypercall and infrastructure for VIO interrupts

This patch adds infrastructure to support interrupts from PAPR virtual IO devices. This includes correctly advertising those interrupts in the device tree, and implementing the H_VIO_SIGNAL hypercall, used to enable and disable individual device interrupts. Signed-off-by: David Gibson --- hw/sp

[Qemu-devel] [PATCH 26/26] Implement PAPR VPA functions for pSeries shared processor partitions

Shared-processor partitions are those where a CPU is time-sliced between partitions, rather than being permanently dedicated to a single partition. qemu emulated partitions, since they are just scheduled with the qemu user process, behave mostly like shared processor partitions. In order to bette

[Qemu-devel] [PATCH 11/26] Support 1T segments on ppc

Traditionally, the "segments" used for the two-stage translation used on powerpc MMUs were 256MB in size. This was the only option on all hash page table based 32-bit powerpc cpus, and on the earlier 64-bit hash page table based cpus. However, newer 64-bit cpus also permit 1TB segments This patc

[Qemu-devel] [PATCH 10/26] Better factor the ppc hash translation path

Currently the path handling hash page table translation in get_segment() has a mix of common and 32 or 64 bit specific code. However the division is not done terribly well which results in a lot of messy code flipping between common and divided paths. This patch improves the organization, consoli

[Qemu-devel] [PATCH 15/26] Virtual hash page table handling on pSeries machine

On pSeries logical partitions, excepting the old POWER4-style full system partitions, the guest does not have direct access to the hardware page table. Instead, the pagetable exists in hypervisor memory, and the guest must manipulate it with hypercalls. However, our current pSeries emulation more

[Qemu-devel] [PATCH 04/26] Implement PowerPC slbmfee and slbmfev instructions

From: David Gibson For a 64-bit PowerPC target, qemu correctly implements translation through the segment lookaside buffer. Likewise it supports the slbmte instruction which is used to load entries into the SLB. However, it does not emulate the slbmfee and slbmfev instructions which read SLB en

[Qemu-devel] [PATCH 09/26] Use "hash" more consistently in ppc mmu code

Currently, get_segment() has a variable called hash. However it doesn't (quite) get the hash value for the ppc hashed page table. Instead it gets the hash shifted - effectively the offset of the hash bucket within the hash page table. As well, as being different to the normal use of plain "hash"

[Qemu-devel] [PATCH 03/26] Add a hook to allow hypercalls to be emulated on PowerPC

From: David Gibson PowerPC and POWER chips since the POWER4 and 970 have a special hypervisor mode, and a corresponding form of the system call instruction which traps to the hypervisor. qemu currently has stub implementations of hypervisor mode. That is, the outline is there to allow qemu to r

[Qemu-devel] [PATCH 07/26] Clean up slb_lookup() function

The slb_lookup() function, used in the ppc translation path returns a number of slb entry fields in reference parameters. However, only one of the two callers of slb_lookup() actually wants this information. This patch, therefore, makes slb_lookup() return a simple pointer to the located SLB entr

[Qemu-devel] [PATCH 05/26] Implement missing parts of the logic for the POWER PURR

From: David Gibson The PURR (Processor Utilization Resource Register) is a register found on recent POWER CPUs. The guts of implementing it at least enough to get by are already present in qemu, however some of the helper functions needed to actually wire it up are missing. This patch adds the

[Qemu-devel] [PATCH 08/26] Parse SDR1 on mtspr instead of at translate time

On ppc machines with hash table MMUs, the special purpose register SDR1 contains both the base address of the encoded size (hashed) page tables. At present, we interpret the SDR1 value within the address translation path. But because the encodings of the size for 32-bit and 64-bit are different t

[Qemu-devel] [PATCH 02/26] Allow qemu_devtree_setprop() to take arbitrary values

From: David Gibson Currently qemu_devtree_setprop() expects the new property value to be given as a uint32_t *. While property values consisting of u32s are common, in general they can have any bytestring value. Therefore, this patch alters the function to take a void * instead, allowing caller

[Qemu-devel] [PATCH 01/26] Clean up PowerPC SLB handling code

Currently the SLB information when emulating a PowerPC 970 is storeed in a structure with the unhelpfully named fields 'tmp' and 'tmp64'. While the layout in these fields does match the description of the SLB in the architecture document, it is not convenient either for looking up the SLB, or for

[Qemu-devel] Implement emulation of pSeries logical partitions (v3)

This patch series adds a "pseries" machine to qemu, allowing it to emulate IBM pSeries logical partitions. More specifically it implements the interface defined by the "PowerPC Architecture Platform Requirements" document (PAPR, or sPAPR for short). Along the way we add a bunch of support for mor

[Qemu-devel] Re: [PATCH, RFC] virtio_blk: add cache control support

On Tue, 15 Mar 2011 15:16:44 +0100, Christoph Hellwig wrote: > Add support for the new dynamic features config space field to allow > en/disabling the write cache at runtime. The userspace interface is > a SCSI-compatible sysfs attribute. > > Signed-off-by: Christoph Hellwig Hi Christoph,

[Qemu-devel] [PATCH 03/35] x86: Account for MCE in cpu_has_work

From: Jan Kiszka MCEs can be injected asynchronously, so they can also terminate the halt state. Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetoshi Seto CC: Jin Dongming Signed-off-by: Marcelo Tosatti --- target-i386/exec.h | 15 ++- 1 files changed, 6 insertions(+), 9 de

[Qemu-devel] [PATCH 06/35] x86: Refine error reporting of MCE injection services

From: Jan Kiszka As this service is used by the human monitor, make sure that errors get reported to the right channel, and also raise the verbosity. This requires to move Monitor typedef in qemu-common.h to resolve the include dependency. Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetosh

[Qemu-devel] [PATCH 15/35] kvm: x86: Fail kvm_arch_init_vcpu if MCE initialization fails

From: Jan Kiszka There is no reason to continue if the kernel claims to support MCE but then fails to process our request. Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetoshi Seto CC: Jin Dongming Signed-off-by: Marcelo Tosatti --- target-i386/kvm.c | 30 +-

[Qemu-devel] [PATCH 31/35] kvm: Rework inner loop of kvm_cpu_exec

From: Jan Kiszka Let kvm_cpu_exec return EXCP_* values consistently and generate those codes already inside its inner loop. This means we will now re-enter the kernel while ret == 0. Update kvm_handle_internal_error accordingly, but keep kvm_arch_handle_exit untouched, it will be converted in a

RE: [Qemu-devel] Windows 7 on pure qemu-0.14

Hi to all, thanks for the suggestion to make use of the -cpu nehalem switch. I try to use the option you suggest but I receive this error: Unable to find x86 CPU definition [marcian@metal x86_64-softmmu]$ ./qemu-system-x86_64 -cpu ? x86 [n270] x86 [athlon] x86

[Qemu-devel] [Bug 584143] Re: qemu fails to set hdd serial number

** Tags added: verification-needed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/584143 Title: qemu fails to set hdd serial number Status in QEMU: Fix Released Status in “qemu-kvm” package in Ub

Re: [Qemu-devel] [PATCH] pc-bios: Use iPXE ROMs

On Tue, 2011-03-15 at 23:24 +0100, Stefan Weil wrote: > Am 15.03.2011 18:00, schrieb Alex Williamson: > > Refresh PXE ROMs from the iPXE project (http://ipxe.org). This > > includes moving eepro100 to use standard naming and including a > > script to easily refresh PXE ROMs from either a local git

[Qemu-devel] [PATCH 17/35] KVM, MCE, unpoison memory address across reboot

From: Huang Ying In Linux kernel HWPoison processing implementation, the virtual address in processes mapping the error physical memory page is marked as HWPoison. So that, the further accessing to the virtual address will kill corresponding processes with SIGBUS. If the error physical memory p

[Qemu-devel] [PATCH 29/35] kvm: Keep KVM_RUN return value in separate variable

From: Jan Kiszka Avoid using 'ret' both for the return value of KVM_RUN as well as the code kvm_cpu_exec is supposed to return. Both have no direct relation. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- kvm-all.c | 10 +- 1 files changed, 5 insertions(+), 5 deletions

[Qemu-devel] [PATCH 28/35] kvm: Consider EXIT_DEBUG unknown without CAP_SET_GUEST_DEBUG

From: Jan Kiszka Without KVM_CAP_SET_GUEST_DEBUG, we neither motivate the kernel to report KVM_EXIT_DEBUG nor do we expect such exits. So fall through to the arch code which will simply report an unknown exit reason. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- kvm-all.c |

[Qemu-devel] [PATCH 33/35] kvm: x86: Reorder functions in kvm.c

From: Jan Kiszka Required for next patch which will access guest debug services from kvm_arch_handle_exit. No functional changes. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-i386/kvm.c | 108 ++-- 1 files changed, 54 ins

[Qemu-devel] [PATCH 30/35] kvm: Reorder error handling of KVM_RUN

From: Jan Kiszka Test for general errors first as this is the slower path. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- kvm-all.c | 11 +-- 1 files changed, 5 insertions(+), 6 deletions(-) diff --git a/kvm-all.c b/kvm-all.c index be235ec..8531555 100644 --- a/kvm-al

[Qemu-devel] [PATCH 34/35] kvm: x86: Push kvm_arch_debug to kvm_arch_handle_exit

From: Jan Kiszka There are no generic bits remaining in the handling of KVM_EXIT_DEBUG. So push its logic completely into arch hands, i.e. only x86 so far. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- kvm-all.c | 11 --- kvm.h |2 -- target-i3

[Qemu-devel] [PATCH 27/35] kvm: x86: Synchronize PAT MSR with the kernel

From: Jan Kiszka Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-i386/kvm.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 3a07fce..032bc3e 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -8

[Qemu-devel] [PATCH 26/35] x86: Save/restore PAT MSR

From: Jan Kiszka Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-i386/machine.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/target-i386/machine.c b/target-i386/machine.c index d78eceb..6384f54 100644 --- a/target-i386/machine.c +++ b/target-i38

[Qemu-devel] [PATCH 35/35] Expose thread_id in info cpus

From: Jan Kiszka Based on patch by Glauber Costa: To allow management applications like libvirt to apply CPU affinities to the VCPU threads, expose their ID via info cpus. This patch provides the pre-existing and used interface from qemu-kvm. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo To

Re: [Qemu-devel] [PATCH] pc-bios: Use iPXE ROMs

Am 15.03.2011 18:00, schrieb Alex Williamson: Refresh PXE ROMs from the iPXE project (http://ipxe.org). This includes moving eepro100 to use standard naming and including a script to easily refresh PXE ROMs from either a local git tree or the upstream project. We include the 'git describe' output

[Qemu-devel] [PATCH 05/35] x86: Small cleanups of MCE helpers

From: Jan Kiszka Fix some code style issues, use proper headers, and align to cpu_x86 naming scheme. No functional changes. Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetoshi Seto CC: Jin Dongming Signed-off-by: Marcelo Tosatti --- cpu-all.h|4 monitor.c

[Qemu-devel] [PATCH 32/35] kvm: Align kvm_arch_handle_exit to kvm_cpu_exec changes

From: Jan Kiszka Make the return code of kvm_arch_handle_exit directly usable for kvm_cpu_exec. This is straightforward for x86 and ppc, just s390 would require more work. Avoid this for now by pushing the return code translation logic into s390's kvm_arch_handle_exit. Signed-off-by: Jan Kiszka

[Qemu-devel] [PATCH 11/35] kvm: x86: Inject pending MCE events on state writeback

From: Jan Kiszka The current way of injecting MCE events without updating of and synchronizing with the CPUState is broken and causes spurious corruptions of the MCE-related parts of the CPUState. As a first step towards a fix, enhance the state writeback code with support for injecting events t

[Qemu-devel] [PATCH 10/35] kvm: Rename kvm_arch_process_irqchip_events to async_events

From: Jan Kiszka We will broaden the scope of this function on x86 beyond irqchip events. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- kvm-all.c |2 +- kvm.h |2 +- target-i386/kvm.c |2 +- target-ppc/kvm.c |2 +- target-s390x/kvm.c |

[Qemu-devel] [PATCH 09/35] kvm: x86: Move MCE functions together

From: Jan Kiszka Pure function suffling to avoid multiple #ifdef KVM_CAP_MCE sections, no functional changes. While at it, annotate some #ifdef sections. Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetoshi Seto CC: Jin Dongming Signed-off-by: Marcelo Tosatti --- target-i386/kvm.c | 346

[Qemu-devel] [PATCH 13/35] kvm: x86: Consolidate TCG and KVM MCE injection code

From: Jan Kiszka This switches KVM's MCE injection path to cpu_x86_inject_mce, both for SIGBUS and monitor initiated events. This means we prepare the MCA MSRs in the VCPUState also for KVM. We have to drop the MSRs writeback restrictions for this purpose which is now safe as every uncoordinated

[Qemu-devel] [PATCH 01/35] kvm: ppc: Fix breakage of kvm_arch_pre_run/process_irqchip_events

From: Jan Kiszka Commit 7a39fe5882 failed to convert the right arch function. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-ppc/kvm.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c index bd4012a..3924f4b

[Qemu-devel] [PATCH 25/35] x86: Properly reset PAT MSR

From: Jan Kiszka Conforming to the Intel spec, set the power-on value of PAT also on reset, but save it across INIT. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-i386/cpu.h|4 ++-- target-i386/cpuid.c |1 - target-i386/helper.c |5 + 3 files changed

[Qemu-devel] [PATCH 21/35] Break up user and system cpu_interrupt implementations

From: Jan Kiszka Both have only two lines in common, and we will convert the system service into a callback which is of no use for user mode operation. Signed-off-by: Jan Kiszka CC: Riku Voipio Signed-off-by: Marcelo Tosatti --- exec.c | 14 ++ 1 files changed, 10 insertions(+)

[Qemu-devel] [PATCH 19/35] x86: Unbreak TCG support for hardware breakpoints

From: Jan Kiszka Commit 83f338f73e broke x86 hardware breakpoint emulation by moving the debug exception handling out of cpu_exec. Fix this by moving all TCG related bits back, only leaving the generic guest debugging parts in cpus.c. Signed-off-by: Jan Kiszka CC: TeLeMan Signed-off-by: Marcel

[Qemu-devel] [PATCH 16/35] Add qemu_ram_remap

From: Huang Ying qemu_ram_remap() unmaps the specified RAM pages, then re-maps these pages again. This is used by KVM HWPoison support to clear HWPoisoned page tables across guest rebooting, so that a new page may be allocated later to recover the memory error. [ Jan: style fixlets, WIN32 fix ]

[Qemu-devel] [PATCH 22/35] kvm: Add in-kernel irqchip awareness to cpu_thread_is_idle

From: Jan Kiszka With in-kernel irqchip support enabled, the vcpu threads sleep in kernel space while halted. Account for this difference in cpu_thread_is_idle. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- cpus.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) di

[Qemu-devel] [PATCH 24/35] kvm: Mark VCPU state dirty on creation

From: Jan Kiszka This avoids that early cpu_synchronize_state calls try to retrieve an uninitialized state from the kernel. That even causes a deadlock if io-thread is enabled. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- kvm-all.c |1 + 1 files changed, 1 insertions(+), 0

[Qemu-devel] [PATCH 07/35] x86: Optionally avoid injecting AO MCEs while others are pending

From: Jan Kiszka Allow to tell cpu_x86_inject_mce that it should ignore Action Optional MCE events when the target VCPU is still processing another one. This will be used by KVM soon. Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetoshi Seto CC: Jin Dongming Signed-off-by: Marcelo Tosatti

[Qemu-devel] [PATCH 14/35] kvm: x86: Clean up kvm_setup_mce

From: Jan Kiszka There is nothing to abstract here. Fold kvm_setup_mce into its caller and fix up the error reporting (return code of kvm_vcpu_ioctl holds the error value). Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetoshi Seto CC: Jin Dongming Signed-off-by: Marcelo Tosatti --- targe

[Qemu-devel] [PATCH 12/35] x86: Run qemu_inject_x86_mce on target VCPU

From: Jan Kiszka We will use the current TCG-only MCE injection path for KVM as well, and then this read-modify-write of the target VCPU state has to be performed synchronously in the corresponding thread. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-i386/helper.c | 8

[Qemu-devel] [PATCH 08/35] Synchronize VCPU states before reset

From: Jan Kiszka This is required to support keeping VCPU states across a system reset. If we do not read the current state before the reset, cpu_synchronize_all_post_reset may write back incorrect state information. The first user of this will be MCE MSR synchronization which currently works ar

[Qemu-devel] [PATCH 02/35] kvm: Fix build warning when KVM_CAP_SET_GUEST_DEBUG is lacking

From: Jan Kiszka Original fix by David Gibson. CC: David Gibson Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- kvm-all.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/kvm-all.c b/kvm-all.c index e6a7de4..7753c8a 100644 --- a/kvm-all.c +++ b/kvm-all.c

[Qemu-devel] [PATCH 04/35] x86: Perform implicit mcg_status reset

From: Jan Kiszka Reorder mcg_status in CPUState to achieve automatic clearing on reset. Signed-off-by: Jan Kiszka CC: Huang Ying CC: Hidetoshi Seto CC: Jin Dongming Signed-off-by: Marcelo Tosatti --- target-i386/cpu.h|3 ++- target-i386/helper.c |2 -- 2 files changed, 2 insert

[Qemu-devel] [PATCH 18/35] Implement qemu_kvm_eat_signals only for CONFIG_LINUX

From: Jan Kiszka qemu_kvm_eat_signals requires POSIX support with realtime extensions for sigtimedwait. Not all our target platforms provide this. Moreover, undefined sigbus_reraise was referenced on non-Linux as well. Signed-off-by: Jan Kiszka CC: Andreas Färber Signed-off-by: Marcelo Tosatti

[Qemu-devel] [PATCH 00/35] [PULL] qemu-kvm.git uq/master queue

The following changes since commit cc015e9a5dde2f03f123357fa060acbdfcd570a4: add Win32 IPI service (2011-03-13 14:44:22 +) are available in the git repository at: git://git.kernel.org/pub/scm/virt/kvm/qemu-kvm.git uq/master Huang Ying (2): Add qemu_ram_remap KVM, MCE, unpoiso

[Qemu-devel] [PATCH 20/35] s390: Detect invalid invocations of qemu_ram_free/remap

From: Jan Kiszka This both detects invalid invocations of qemu_ram_free and qemu_ram_remap when mem_path is non-NULL and fixes a build error on s390 ("'area' may be used uninitialized in this function"). Signed-off-by: Jan Kiszka CC: Alexander Graf Signed-off-by: Marcelo Tosatti --- exec.c |

[Qemu-devel] [PATCH 23/35] kvm: x86: Do not leave halt if interrupts are disabled

From: Jan Kiszka When an external interrupt is pending but IF is cleared, we must not leave the halt state prematurely. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-i386/kvm.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/target-i386/kvm.c

Re: [Qemu-devel] [PATCH] vl.c: Replace -virtfs string manipulation with QemuOpts

On 3/13/2011 11:08 AM, Stefan Hajnoczi wrote: > The -virtfs option creates an fsdev representing the pass-through file > system and a guest-visible virtio-9p-pci device that can access this > file system. This patch replaces the string manipulation used to build > and reparse option lists with dir

[Qemu-devel] [Bug 735752] [NEW] qemu squeeze crashes "BUG: unable to handle kernel NULL pointer dereference at (null)"

Public bug reported: my virtual machine server (qemu+libvirt) regularly breaks down with such a record in the logs I can not even ping the guest, but i can ping host, but can not do something with it (cannot ssh login for example) And I dont know how to reproduce the problem :( Mar 15 17:58:04

[Qemu-devel] [Bug 697197] Re: Empty password allows access to VNC in libvirt

** Branch linked: lp:ubuntu/maverick-updates/qemu-kvm ** Branch linked: lp:ubuntu/lucid-updates/qemu-kvm ** Branch linked: lp:ubuntu/karmic-security/qemu-kvm -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net

Re: [Qemu-devel] OSX build issues

Le 15 mars 2011 à 22:03, Blue Swirl a écrit : > On Mon, Mar 14, 2011 at 11:21 PM, François Revol wrote: >> The OSX build has been broken for some time now... >> >> * qemu-thread-posix.c: >> both qemu_mutex_timedlock and qemu_cond_timedwait make use of >> clock_gettime() and CLOCK_REALTIME, whi

Re: [Qemu-devel] KVM call minutes for Mar 15

On 03/15/2011 02:06 PM, Chris Wright wrote: * Anthony Liguori (anth...@codemonkey.ws) wrote: On 03/15/2011 09:53 AM, Chris Wright wrote: QAPI - c library implementation is critical to have unit tests and test driven development - thread safe? - no shared state, no statics. -

Re: [Qemu-devel] OSX build issues

On Mon, Mar 14, 2011 at 11:21 PM, François Revol wrote: > The OSX build has been broken for some time now... > > * qemu-thread-posix.c: > both qemu_mutex_timedlock and qemu_cond_timedwait make use of clock_gettime() > and CLOCK_REALTIME, which OSX doesn't have. > It seems like both functions are

Re: [Qemu-devel] [PATCH] win32: implement missing timersub

On Sun, Mar 13, 2011 at 7:00 PM, Stefan Weil wrote: > Am 13.03.2011 15:49, schrieb Blue Swirl: >> >> Implement and wrap timersub() for Win32. >> >> Signed-off-by: Blue Swirl >> --- >> osdep.h | 19 +-- >> ui/vnc.c | 6 +++--- >> 2 files changed, 20 insertions(+), 5 deletions(-) >> >

[Qemu-devel] [PATCH 1/4] qxl/spice-display: move pipe to ssd

this moves the int pipe[2] and pthread_t main data from the PCIQXLDevice struct to the SimpleSpiceDisplay. This will let us reuse it in the next patch for both -spice with no -qxl usage and for vga mode from qxl. --- hw/qxl.c | 32 hw/qxl.h |

[Qemu-devel] [PATCH 4/4] hw/qxl-render: drop cursor locks, add TODO's.

Dropping the locks prevents a deadlock when running with -sdl or -vnc in addition to -spice. When server calls get_cursor_command, and we have an active ds cursor related callback in non vga mode, we need to lock to prevent the iothread (via sdl/vnc gui_update timer) from touching the ds as well.

[Qemu-devel] [PATCH 3/4] qxl/spice: remove qemu_mutex_{un, }lock_iothread around dispatcher

with the previous patch making sure get_command no longer needs to lock, there is no reason to drop the qemu iothread mutex in qxl.c and in ui/spice-display.c The only location where the lock remains are the cursor related callbacks, that path is currently broken. It is only triggered if running s

[Qemu-devel] [PATCH 2/4] qxl: implement get_command in vga mode without locks

From: Uri Lublin This patch and the next drop the requirement to lose the global qemu mutex during dispatcher calls. This patch enables it, the next drops the unlock/lock pairs around dispatcher calls. The current solution of dropping the locks is buggy: * it allows multiple dispatcher calls fr

[Qemu-devel] [PATCH 0/4] qxl: implement vga mode without locks

This patchset removes all uses of unlock/lock in qxl and spice code. It does this by reimplementing the one path that required a lock from the spice-server thread, namely interface_get_command when in vga mode or running without a qxl device. Incidentaly it fixes the assert(cpu_single_env) that h

[Qemu-devel] Re: [PATCH v2 06/20] kvm: Install optimized interrupt handler

On 2011-03-15 18:10, Marcelo Tosatti wrote: > On Tue, Mar 15, 2011 at 12:26:17PM +0100, Jan Kiszka wrote: >> KVM only requires to set the raised IRQ in CPUState and to kick the >> receiving vcpu if it is remote. >> >> Signed-off-by: Jan Kiszka >> --- >> kvm-all.c | 11 +++ >> 1 files ch

[Qemu-devel] General Awarness - Unknown Facts

Hi, Various unknown facts are listed on the website http://khushiwebworld.com . The unknown facts are really good and I have found it very useful, so thought to share the same with you. They are categorized as 1.Unknown facts 2.Health Facts 3.Ayurveda fa

[Qemu-devel] Re: [PATCH] pc-bios: Use iPXE ROMs

On Tue, 2011-03-15 at 12:35 -0500, Anthony Liguori wrote: > On 03/15/2011 12:00 PM, Alex Williamson wrote: > > Refresh PXE ROMs from the iPXE project (http://ipxe.org). This > > includes moving eepro100 to use standard naming and including a > > script to easily refresh PXE ROMs from either a loca

Re: [Qemu-devel] KVM call minutes for Mar 15

* Anthony Liguori (anth...@codemonkey.ws) wrote: > On 03/15/2011 09:53 AM, Chris Wright wrote: > > QAPI > >- c library implementation is critical to have unit tests and test > > driven development > > - thread safe? > > - no shared state, no statics. > > - threading model requires lock

Re: [Qemu-devel] segmentation fault in qemu-kvm-0.14.0

Am 15.03.2011 13:53, schrieb Peter Lieven: On 09.03.2011 08:26, Stefan Weil wrote: Am 08.03.2011 23:53, schrieb Peter Lieven: Hi, during testing of qemu-kvm-0.14.0 i can reproduce the following segfault. i have seen similar crash already in 0.13.0, but had no time to debug. my guess is that

[Qemu-devel] [PATCH] vnc: Limit r/w access to size of allocated memory

This fixes memory reads and writes which exceeded the upper limit of allocated memory vd->guest.ds->data and vd->server->data. Cc: Anthony Liguori Signed-off-by: Stefan Weil --- ui/vnc.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/ui/vnc.c b/ui/vnc.c index 34dc0cd

[Qemu-devel] [PATCH STABLE 0.14] vnc: Limit r/w access to size of allocated memory

This fixes memory reads and writes which exceeded the upper limit of allocated memory vd->guest.ds->data and vd->server->data. Cc: Anthony Liguori Signed-off-by: Stefan Weil --- ui/vnc.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/ui/vnc.c b/ui/vnc.c index f4fea04

[Qemu-devel] Re: [PATCH v2 00/20] [uq/master] Patch queue, part V (the rest)

On Tue, Mar 15, 2011 at 12:26:11PM +0100, Jan Kiszka wrote: > This series catches "all the rest" to prepare QEMU's KVM support for > merging with qemu-kvm. IOW, once these bits here are applied, qemu-kvm > can switch its infrastructure to upstream and is effectively only adding > own bits for in-ke

[Qemu-devel] Re: [PATCH] simpletrace: Move st_init() error reporting

Thanks, applied. On Sun, Mar 13, 2011 at 10:14 PM, Stefan Hajnoczi wrote: > User emulator builds do not have error_report() so it should not be used > by simpletrace.c.  In fact, error reporting inside simpletrace.c is > inappropriate and should be done by the caller instead. > > This patch moves

[Qemu-devel] Re: [PATCH v5] vnc: don't mess up with iohandlers in the vnc thread

On 15.03.2011 17:55, Peter Lieven wrote: On 14.03.2011 10:19, Corentin Chary wrote: On Thu, Mar 10, 2011 at 3:13 PM, Corentin Chary wrote: The threaded VNC servers messed up with QEMU fd handlers without any kind of locking, and that can cause some nasty race conditions. Using qemu_mutex_loc

[Qemu-devel] Re: [PATCH] pc-bios: Use iPXE ROMs

On 03/15/2011 12:00 PM, Alex Williamson wrote: Refresh PXE ROMs from the iPXE project (http://ipxe.org). This includes moving eepro100 to use standard naming and including a script to easily refresh PXE ROMs from either a local git tree or the upstream project. We include the 'git describe' out

[Qemu-devel] Re: [PATCH v2 06/20] kvm: Install optimized interrupt handler

On Tue, Mar 15, 2011 at 12:26:17PM +0100, Jan Kiszka wrote: > KVM only requires to set the raised IRQ in CPUState and to kick the > receiving vcpu if it is remote. > > Signed-off-by: Jan Kiszka > --- > kvm-all.c | 11 +++ > 1 files changed, 11 insertions(+), 0 deletions(-) > > diff --

[Qemu-devel] [PATCH] pc-bios: Use iPXE ROMs

Refresh PXE ROMs from the iPXE project (http://ipxe.org). This includes moving eepro100 to use standard naming and including a script to easily refresh PXE ROMs from either a local git tree or the upstream project. We include the 'git describe' output in the resulting product name, making it easy

[Qemu-devel] Re: [PATCH v5] vnc: don't mess up with iohandlers in the vnc thread

On 14.03.2011 10:19, Corentin Chary wrote: On Thu, Mar 10, 2011 at 3:13 PM, Corentin Chary wrote: The threaded VNC servers messed up with QEMU fd handlers without any kind of locking, and that can cause some nasty race conditions. Using qemu_mutex_lock_iothread() won't work because vnc_dpy_cp

[Qemu-devel] [PATCH] pcnet: Fix sign extension: make ipxe work with >2G RAM

From: Michael Brown The problem is with definitions in hw/pcnet.c such as: #define CSR_CRDA(S) ((S)->csr[28] | ((S)->csr[29] << 16)) "(S)->csr[29]" is a uint16_t, but "(S)->csr[29] << 16" gets promoted to int, so the overall CSR_CRDA(s) is a (signed) int rather than a uint32_t. This the

[Qemu-devel] [PATCH 0/2] ARM: fix VLD of one element to all lanes

This patchset fixes various bugs in the implementation of the Neon instructions loading a single element to all lanes. The primary bug is that VLD1's "single element to all lanes" form differs from those for VLD2, VLD3 and VLD4 in that bit 5 indicates whether the loaded element should be written t

[Qemu-devel] [PATCH v2 3/3] microblaze: Add PetaLogix ml605 MMU little-endian ref design

From: Michal Simek Add the first Microblaze little endian platform. Platform uses uart16550, axi ethernet, timer, intc. Signed-off-by: Michal Simek Signed-off-by: Edgar E. Iglesias --- Makefile|2 +- Makefile.target |1 + hw/petalogix_ml605_mmu.c|

[Qemu-devel] [PATCH 2/2] target-arm: Don't leak TCG temp for UNDEFs in Neon load/store space

Move the allocation and freeing of the TCG temp used for the address for Neon load/store instructions so that we don't allocate the temporary until we've done enough decoding to know that the instruction is not an UNDEF pattern; this avoids leaking the TCG temp in these cases. Signed-off-by: Peter

Re: [Qemu-devel] KVM call minutes for Mar 15

On 03/15/2011 09:53 AM, Chris Wright wrote: QAPI -- http://wiki.qemu.org/Features/QAPI - please review! - Anthony would like to see feedback and plans to commit in a week (assuming agreement and no major issues in review) - some concern about the maintainability of code generation - but sti

[Qemu-devel] [PATCH 1/2] target-arm: Fix VLD of single element to all lanes

Fix several bugs in VLD of single element to all lanes: The "single element to all lanes" form of VLD1 differs from those for VLD2, VLD3 and VLD4 in that bit 5 indicates whether the loaded element should be written to one or two Dregs (rather than being a register stride). Handle this by special-c

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