On 08.07.22 06:17, Stefan Hajnoczi wrote:
Block drivers may optimize I/O requests accessing buffers previously
registered with bdrv_register_buf(). Checking whether all elements of a
request's QEMUIOVector are within previously registered buffers is
expensive, so we need a hint from the user to a
On 08.07.22 06:17, Stefan Hajnoczi wrote:
Emulated devices and other BlockBackend users wishing to take advantage
of blk_register_buf() all have the same repetitive job: register
RAMBlocks with the BlockBackend using RAMBlockNotifier.
Add a BlockRAMRegistrar API to do this. A later commit will u
On 08.07.22 06:17, Stefan Hajnoczi wrote:
The blkio block driver will need to look up the file descriptor for a
given pointer. This is possible in softmmu builds where the memory API
is available for querying guest RAM.
Add stubs so tools like qemu-img that link the block layer still build
succe
On 08.07.22 06:17, Stefan Hajnoczi wrote:
Register guest RAM using BlockRAMRegistrar and set the
BDRV_REQ_REGISTERED_BUF flag so block drivers can optimize memory
accesses in I/O requests.
This is for vdpa-blk, vhost-user-blk, and other I/O interfaces that rely
on DMA mapping/unmapping.
Signed-
On 08.07.22 06:17, Stefan Hajnoczi wrote:
Avoid bounce buffers when QEMUIOVector elements are within previously
registered bdrv_register_buf() buffers.
The idea is that emulated storage controllers will register guest RAM
using bdrv_register_buf() and set the BDRV_REQ_REGISTERED_BUF on I/O
reque
Hi,
While reviewing Stefanâs libblkio driver series, Iâve noticed that
block/parallels.c contains a call to bdrv_co_pwritev() that doesnât pass
a QEMUIOVector object but a plain buffer instead. That seems wrong and
also pretty dangerous, so change it to a bdrv_co_pwrite() call (as I
assume
Commit a4072543ccdddbd241d5962d9237b8b41fd006bf has changed the I/O here
from working on a local one-element I/O vector to just using the buffer
directly (using the bdrv_co_pread()/bdrv_co_pwrite() helper functions
introduced shortly before).
However, it only changed the bdrv_co_preadv() call to b
Test an allocating write to a parallels image that has a backing node.
Before HEAD^, doing so used to give me a failed assertion (when the
backing node contains only `42` bytes; the results varies with the value
chosen, for `0` bytes, for example, all I get is EIO).
Signed-off-by: Hanna Reitz
---
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
Also here ->aio_context is read by I/O threads and written
under BQL.
Signed-off-by: Emanuele Giuseppe Esposito
---
block.c | 2 ++
1 file changed, 2 insertions(+)
Reviewed-by: Hanna Reitz
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
First change the transactions from a QLIST to QSIMPLEQ, then
use it to implement tran_add_tail, which allows adding elements
to the end of list transactions.
The subject still calls it `tran_add_back()` (perhaps from a preliminary
version?),
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
-
RFC because I am not sure about the AioContext locks.
- Do we need to take the new AioContext lock? what does it protect?
- Taking the old AioContext lock is required now, because of
bdrv_drained_begin calling AIO_WAIT_WHILE that u
at 1:34 PM, Klaus Jensen wrote:
> From: Klaus Jensen
>
> While testing Jinhaos ioeventfd patch I found it useful with a couple of
> additional trace events since we no longer see the mmio events.
>
> Signed-off-by: Klaus Jensen
> ---
> hw/nvme/ctrl.c | 8
> hw/nvme/trace-events
This patch allows the user to attach an external drive as a property
for an onboard at24c eeprom device. It uses an unit number to
distinguish different devices.
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx_boards.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a
We allow at24c_eeprom_init to take a I2CBus* as parameter. This allows
us to attach an EEPROM device behind an I2C mux which is not
possible with the old method.
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx_boards.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw
The ACK bit in NPCM7XX SMBus module should be cleared each time it
sends out a NACK signal. This patch fixes the bug that it fails to
do so.
Signed-off-by: Hao Wu
Reviewed-by: Titus Rwantare
Reviewed-by: Peter Maydell
---
hw/i2c/npcm7xx_smbus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Our sensor test requires both reading and writing from a sensor's
QOM property. So we need to make the input of ADC module R/W instead
of write only for that to work.
Signed-off-by: Hao Wu
Reviewed-by: Titus Rwantare
Reviewed-by: Peter Maydell
---
hw/adc/npcm7xx_adc.c | 2 +-
1 file changed, 1
[NOTE: I'm reviving a bunch of patches that was in the process of
upstreaming a while ago but paused.]
This patch set contains a few bug fixes and I2C devices for some
NPCM7XX boards.
Patch 1~2 fix a problem that causes the SMBus module to behave
incorrectly when it's in FIFO mode and trying to r
Originally we read in from SMBus when RXF_STS is cleared. However,
the driver clears RXF_STS before setting RXF_CTL, causing the SM bus
module to read incorrect amount of bytes in FIFO mode when the number
of bytes read changed. This patch fixes this issue.
Signed-off-by: Hao Wu
Reviewed-by: Titu
This type is used to represent block devs that are not suitable to
be represented by other existing types.
A sample use is to represent an at24c eeprom device defined in
hw/nvram/eeprom_at24c.c. The block device can be used to contain the
content of the said eeprom device.
Signed-off-by: Hao Wu
The correct bit for the CONV bit in NPCM7XX ADC is bit 13. This patch
fixes that in the module, and also lower the IRQ when the guest
is done handling an interrupt event from the ADC module.
Signed-off-by: Hao Wu
Reviewed-by: Patrick Venture
Reviewed-by: Peter Maydell
---
hw/adc/npcm7xx_adc.c
From: Patrick Venture
Adds supported i2c devices to the quanta-gbc-bmc board.
Signed-off-by: Patrick Venture
Reviewed-by: Hao Wu
---
hw/arm/npcm7xx_boards.c | 82 -
1 file changed, 49 insertions(+), 33 deletions(-)
diff --git a/hw/arm/npcm7xx_boards.c
[NOTE: I'm reviving a bunch of patches that was in the process of
upstreaming a while ago but paused.]
This patch set contains a few bug fixes and I2C devices for some
NPCM7XX boards.
Patch 1~2 fix a problem that causes the SMBus module to behave
incorrectly when it's in FIFO mode and trying to r
The correct bit for the CONV bit in NPCM7XX ADC is bit 13. This patch
fixes that in the module, and also lower the IRQ when the guest
is done handling an interrupt event from the ADC module.
Signed-off-by: Hao Wu
Reviewed-by: Patrick Venture
Reviewed-by: Peter Maydell
---
hw/adc/npcm7xx_adc.c
Our sensor test requires both reading and writing from a sensor's
QOM property. So we need to make the input of ADC module R/W instead
of write only for that to work.
Signed-off-by: Hao Wu
Reviewed-by: Titus Rwantare
Reviewed-by: Peter Maydell
---
hw/adc/npcm7xx_adc.c | 2 +-
1 file changed, 1
The ACK bit in NPCM7XX SMBus module should be cleared each time it
sends out a NACK signal. This patch fixes the bug that it fails to
do so.
Signed-off-by: Hao Wu
Reviewed-by: Titus Rwantare
Reviewed-by: Peter Maydell
---
hw/i2c/npcm7xx_smbus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
[NOTE: I'm reviving a bunch of patches that was in the process of
upstreaming a while ago but paused.]
This patch set contains a few bug fixes and I2C devices for some
NPCM7XX boards.
Patch 1~2 fix a problem that causes the SMBus module to behave
incorrectly when it's in FIFO mode and trying to r
The ACK bit in NPCM7XX SMBus module should be cleared each time it
sends out a NACK signal. This patch fixes the bug that it fails to
do so.
Signed-off-by: Hao Wu
Reviewed-by: Titus Rwantare
Reviewed-by: Peter Maydell
---
hw/i2c/npcm7xx_smbus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Originally we read in from SMBus when RXF_STS is cleared. However,
the driver clears RXF_STS before setting RXF_CTL, causing the SM bus
module to read incorrect amount of bytes in FIFO mode when the number
of bytes read changed. This patch fixes this issue.
Signed-off-by: Hao Wu
Reviewed-by: Titu
Originally we read in from SMBus when RXF_STS is cleared. However,
the driver clears RXF_STS before setting RXF_CTL, causing the SM bus
module to read incorrect amount of bytes in FIFO mode when the number
of bytes read changed. This patch fixes this issue.
Signed-off-by: Hao Wu
Reviewed-by: Titu
This type is used to represent block devs that are not suitable to
be represented by other existing types.
A sample use is to represent an at24c eeprom device defined in
hw/nvram/eeprom_at24c.c. The block device can be used to contain the
content of the said eeprom device.
Signed-off-by: Hao Wu
This type is used to represent block devs that are not suitable to
be represented by other existing types.
A sample use is to represent an at24c eeprom device defined in
hw/nvram/eeprom_at24c.c. The block device can be used to contain the
content of the said eeprom device.
Signed-off-by: Hao Wu
This patch allows the user to attach an external drive as a property
for an onboard at24c eeprom device. It uses an unit number to
distinguish different devices.
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx_boards.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a
Our sensor test requires both reading and writing from a sensor's
QOM property. So we need to make the input of ADC module R/W instead
of write only for that to work.
Signed-off-by: Hao Wu
Reviewed-by: Titus Rwantare
Reviewed-by: Peter Maydell
---
hw/adc/npcm7xx_adc.c | 2 +-
1 file changed, 1
The correct bit for the CONV bit in NPCM7XX ADC is bit 13. This patch
fixes that in the module, and also lower the IRQ when the guest
is done handling an interrupt event from the ADC module.
Signed-off-by: Hao Wu
Reviewed-by: Patrick Venture
Reviewed-by: Peter Maydell
---
hw/adc/npcm7xx_adc.c
We allow at24c_eeprom_init to take a I2CBus* as parameter. This allows
us to attach an EEPROM device behind an I2C mux which is not
possible with the old method.
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx_boards.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw
From: Patrick Venture
Adds supported i2c devices to the quanta-gbc-bmc board.
Signed-off-by: Patrick Venture
Reviewed-by: Hao Wu
---
hw/arm/npcm7xx_boards.c | 82 -
1 file changed, 49 insertions(+), 33 deletions(-)
diff --git a/hw/arm/npcm7xx_boards.c
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