Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2025-01-08 Thread Cédric Le Goater
On 1/7/25 23:36, Peter Maydell wrote: On Tue, 7 Jan 2025 at 17:55, Cédric Le Goater wrote: Hello, I would not recommend using qemu_irq_invert() in new code. I guess in an ideal world we'd implement a QOM object that encapsulated the the "not gate" logic, similar to TYPE_OR_IRQ. (Though for

Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2025-01-07 Thread Peter Maydell
On Tue, 7 Jan 2025 at 17:55, Cédric Le Goater wrote: > > Hello, > > > I would not recommend using qemu_irq_invert() in new code. > > > > I guess in an ideal world we'd implement a QOM object > > that encapsulated the the "not gate" logic, similar to > > TYPE_OR_IRQ. (Though for TYPE_OR_IRQ we made

Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2025-01-07 Thread Cédric Le Goater
On 11/27/24 12:23, Philippe Mathieu-Daudé wrote: On 27/11/24 10:44, Cédric Le Goater wrote: On 11/14/24 10:48, Jamin Lin wrote: change from v1: 1. Support RTC for AST2700. 2. Support SDHCI write protected pin inverted for AST2500 and AST2600. 3. Introduce Capabilities Register 2 for SD slot 0 a

Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2025-01-07 Thread Cédric Le Goater
Hello, I would not recommend using qemu_irq_invert() in new code. I guess in an ideal world we'd implement a QOM object that encapsulated the the "not gate" logic, similar to TYPE_OR_IRQ. (Though for TYPE_OR_IRQ we made the mistake of making it inherit from TYPE_DEVICE, not TYPE_SYSBUS_DEVICE,

Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2024-11-28 Thread Peter Maydell
On Wed, 27 Nov 2024 at 11:26, Cédric Le Goater wrote: > > > > Having to modify sdhci.c internals is dubious, since inversion > > occurs out of this block. If this is the soc/board layer, isn't > > better to model at this level? Smth like: > > > > -- >8 -- > > diff --git a/hw/arm/aspeed_ast2600.c b

RE: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2024-11-27 Thread Jamin Lin
Hi Philippe, > Subject: Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted > property > > On 27/11/24 10:44, Cédric Le Goater wrote: > > On 11/14/24 10:48, Jamin Lin wrote: > >> change from v1: > >> 1. Support RTC for AST2700. > >> 2. S

Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2024-11-27 Thread Cédric Le Goater
Having to modify sdhci.c internals is dubious, since inversion occurs out of this block. If this is the soc/board layer, isn't better to model at this level? Smth like: -- >8 -- diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index be3eb70cdd7..aad9be66b75 100644 --- a/hw/arm/as

Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2024-11-27 Thread Philippe Mathieu-Daudé
On 27/11/24 10:44, Cédric Le Goater wrote: On 11/14/24 10:48, Jamin Lin wrote: change from v1: 1. Support RTC for AST2700. 2. Support SDHCI write protected pin inverted for AST2500 and AST2600. 3. Introduce Capabilities Register 2 for SD slot 0 and 1. 4. Support create flash devices via command

Re: [PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2024-11-27 Thread Cédric Le Goater
On 11/14/24 10:48, Jamin Lin wrote: change from v1: 1. Support RTC for AST2700. 2. Support SDHCI write protected pin inverted for AST2500 and AST2600. 3. Introduce Capabilities Register 2 for SD slot 0 and 1. 4. Support create flash devices via command line for AST1030. change from v2: replace w

[PATCH v3 0/3] Introduce a new Write Protected pin inverted property

2024-11-14 Thread Jamin Lin via
change from v1: 1. Support RTC for AST2700. 2. Support SDHCI write protected pin inverted for AST2500 and AST2600. 3. Introduce Capabilities Register 2 for SD slot 0 and 1. 4. Support create flash devices via command line for AST1030. change from v2: replace wp-invert with wp-inverted and fix revi