On Wed, Jan 8, 2025 at 12:04 AM Wilfred Mallawa via
wrote:
>
> This is to support uni-directional transports such as SPDM
> over Storage. As specified by the DMTF DSP0286.
>
> Signed-off-by: Wilfred Mallawa
> ---
> backends/spdm-socket.c | 25 +
> include/system/spd
ed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by WM
- Bug fixes from testing
]
Signed-off-by: Wilfred Mallawa
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
---
MAINTAINERS
From: Wilfred Mallawa
Setup Data Object Exchange (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Acked-by: Klaus Jensen
---
docs/specs/index.rst
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Reviewed-by: Wilfred Mallawa
---
include/hw/pci/pcie_doe.h | 2 ++
1 file
ls
v2:
- Add cover letter
- A few code fixes based on comments
- Document SPDM-Utils
- A few tweaks and clarifications to the documentation
Alistair Francis (1):
hw/pci: Add all Data Object Types defined in PCIe r6.0
Huai-Cheng Kuo (1):
backends: Initial support for SPDM socket support
Wi
ed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by WM
- Bug fixes from testing
]
Signed-off-by: Wilfred Mallawa
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
---
MAINTAINERS
errp
- Correctly return false from nvme_init_pci() on error
v5:
- Update MAINTAINERS
v4:
- Rebase
v3:
- Spelling fixes
- Support for SPDM-Utils
v2:
- Add cover letter
- A few code fixes based on comments
- Document SPDM-Utils
- A few tweaks and clarifications to the documentation
Alistair Franc
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Acked-by: Klaus Jensen
---
docs/specs/index.rst
ed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by WM
- Bug fixes from testing
]
Signed-off-by: Wilfred Mallawa
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
---
MAINTAINERS
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Acked-by: Klaus Jensen
---
docs/specs/index.rst
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
se
v3:
- Spelling fixes
- Support for SPDM-Utils
v2:
- Add cover letter
- A few code fixes based on comments
- Document SPDM-Utils
- A few tweaks and clarifications to the documentation
Alistair Francis (1):
hw/pci: Add all Data Object Types defined in PCIe r6.0
Huai-Cheng Kuo (1):
bac
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Acked-by: Klaus Jensen
---
docs/specs/index.rst
ed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by WM
- Bug fixes from testing
]
Signed-off-by: Wilfred Mallawa
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
---
MAINTAINERS
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
the documentation
Alistair Francis (1):
hw/pci: Add all Data Object Types defined in PCIe r6.0
Huai-Cheng Kuo (1):
backends: Initial support for SPDM socket support
Wilfred Mallawa (1):
hw/nvme: Add SPDM over DOE support
MAINTAINERS | 6 +
docs/specs/index.rst
On Fri, Feb 16, 2024 at 6:52 PM Klaus Jensen wrote:
>
> On Feb 15 14:44, Jonathan Cameron wrote:
> > On Tue, 13 Feb 2024 12:44:00 +1000
> > Alistair Francis wrote:
> >
> > Hi All,
> >
> > Just wanted to add that back in v2 Klaus Jensen stated:
> >
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Acked-by: Klaus Jensen
---
docs/specs/index.rst
ed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by WM
- Bug fixes from testing
]
Signed-off-by: Wilfred Mallawa
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
---
include/sysemu/spdm-sock
Alistair Francis (1):
hw/pci: Add all Data Object Types defined in PCIe r6.0
Huai-Cheng Kuo (1):
backends: Initial support for SPDM socket support
Wilfred Mallawa (1):
hw/nvme: Add SPDM over DOE support
docs/specs/index.rst | 1 +
docs/specs/spdm.rst | 122
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
implements socket support and exposes SPDM for a NVMe device.
1: https://github.com/DMTF/libspdm
v3:
- Spelling fixes
- Support for SPDM-Utils
v2:
- Add cover letter
- A few code fixes based on comments
- Document SPDM-Utils
- A few tweaks and clarifications to the documentation
Alistair Francis (1
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
Reviewed-by: Jonathan Cameron
Acked-by: Klaus Jensen
---
docs/specs/index.rst
ed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by WM
- Bug fixes from testing
]
Signed-off-by: Wilfred Mallawa
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
---
include/sysemu/spdm-sock
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
---
docs/specs/index.rst| 1 +
docs/specs/spdm.rst | 114
implements socket support and exposes SPDM for a NVMe device.
2: https://github.com/DMTF/libspdm
v2:
- Add cover letter
- A few code fixes based on comments
- Document SPDM-Utils
- A few tweaks and clarifications to the documentation
Alistair Francis (1):
hw/pci: Add all Data Object Types defined in
ed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by WM
- Bug fixes from testing
]
Signed-off-by: Wilfred Mallawa
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
---
include/sysemu/spdm-sock
Add all of the defined protocols/features from the PCIe-SIG r6.0
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/hw/pci/pcie_doe.h b/
On Mon, Sep 18, 2023 at 8:28 PM Jonathan Cameron
wrote:
>
> On Mon, 18 Sep 2023 13:16:01 +1000
> Alistair Francis wrote:
>
> > On Sat, Sep 16, 2023 at 1:19 AM Jonathan Cameron
> > wrote:
> > >
> > > On Fri, 15 Sep 2023 21:27:22 +1000
> > > Alis
On Sat, Sep 16, 2023 at 1:19 AM Jonathan Cameron
wrote:
>
> On Fri, 15 Sep 2023 21:27:22 +1000
> Alistair Francis wrote:
>
> > From: Huai-Cheng Kuo
>
> Great to see you taking this forwards!
>
>
> >
> > SPDM enables authentication, attestation a
Add all of the defined protocols/features from the PCIe-SIG
"Table 6-32 PCI-SIG defined Data Object Types (Vendor ID = 0001h)"
table.
Signed-off-by: Alistair Francis
---
include/hw/pci/pcie_doe.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/hw/pci/pcie_doe.h b/incl
From: Wilfred Mallawa
Setup Data Object Exchance (DOE) as an extended capability for the NVME
controller and connect SPDM to it (CMA) to it.
Signed-off-by: Wilfred Mallawa
Signed-off-by: Alistair Francis
---
docs/specs/index.rst| 1 +
docs/specs/spdm.rst | 56
g Kuo
Signed-off-by: Chris Browy
Co-developed-by: Jonathan Cameron
Signed-off-by: Jonathan Cameron
[ Changes by AF:
- Convert to be more QEMU-ified
- Move to backends as it isn't PCIe specific
]
Signed-off-by: Alistair Francis
Signed-off-by: Wilfred Mallawa
---
include/sysemu/spdm-sock
On Thu, Jan 19, 2023 at 5:10 PM Markus Armbruster wrote:
>
> Clean up includes so that osdep.h is included first and headers
> which it implies are not included manually.
>
> This commit was created with scripts/clean-includes.
>
> Signed-off-by: Markus Armbruster
Reviewed
On Thu, Jan 19, 2023 at 12:44 PM Keith Busch wrote:
>
> On Thu, Jan 19, 2023 at 10:41:42AM +1000, Alistair Francis wrote:
> > On Thu, Jan 19, 2023 at 9:07 AM Keith Busch wrote:
> > > ---
> > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c
> > &
On Thu, Jan 19, 2023 at 9:07 AM Keith Busch wrote:
>
> On Wed, Jan 18, 2023 at 09:33:05AM -0700, Keith Busch wrote:
> > On Wed, Jan 18, 2023 at 03:04:06PM +, Peter Maydell wrote:
> > > On Tue, 17 Jan 2023 at 19:21, Guenter Roeck wrote:
> > > > Anyway - any idea what to do to help figuring out
On Thu, Jan 12, 2023 at 6:40 PM Thomas Huth wrote:
>
> '-drive if=none' is meant for configuring back-end devices only, so this
> got marked as deprecated in QEMU 6.2. Users should now only use the new
> way with '-drive if=pflash' instead.
>
> Signed-off-b
This is confusing for the user.
>
> Use blk_check_size_and_read_all() instead of blk_pread() to improve
> the reported error.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/block/m25p80.c | 4 ++--
> 1 file changed, 2 insertions(+)
eEState to inherit from MachineState since it is registered
> as a machine.
>
> Signed-off-by: Bernhard Beschow
Reviewed-by: Alistair Francis
Alistair
> ---
> include/hw/riscv/sifive_e.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw
On Sat, Aug 13, 2022 at 10:01 PM Anton Kochkov wrote:
>
> * Implement Octal SPI commands based on Micron MT35X series
> * Fix Micron 0x2C-based ID handling (incompatible with Numonyx)
> * Fix Micron configuration registers handling
>
> Signed-off-by: Anton Kochkov
> Resolves: https://gitlab.com/q
sdhci", and commit 26c607b86b for
> device "pl181".
>
> The device remains not user-creatable, because its users should (and
> do) wire up its GPIO chip-select line.
>
> Cc: Peter Maydell
> Cc: Alistair Francis
> Cc: Bin Meng
> Cc: Palmer Dabbelt
> Cc: &
Change them to use drive_get() directly. This makes the (zero) unit
> number explicit in the code.
>
> Cc: Beniamino Galvani
> Cc: Peter Maydell
> Cc: Subbaraya Sundeep
> Cc: Niek Linnenbank
> Cc: Andrew Baumann
> Cc: "Philippe Mathieu-Daudé"
> Cc: Jean-Chr
On Tue, Nov 16, 2021 at 2:10 AM Thomas Huth wrote:
>
> On 15/11/2021 08.12, Alistair Francis wrote:
> > On Mon, Nov 15, 2021 at 3:32 PM Markus Armbruster wrote:
> >>
> >> Peter Maydell writes:
> >>
> >>> On Fri, 12 Nov 2021 at 13:34, Markus A
On Mon, Nov 15, 2021 at 3:32 PM Markus Armbruster wrote:
>
> Peter Maydell writes:
>
> > On Fri, 12 Nov 2021 at 13:34, Markus Armbruster wrote:
> >>
> >> Thomas Huth writes:
> >>
> >> > On 03/11/2021 09.41, Markus Armbruster wrote:
> >> >> Peter Maydell writes:
> >> >>
> >> >>> Does it make se
with all respect, will have to disagree that this
> > > > > is buggy.
> > > >
> > > > Well, the existing m25p80 implementation that uses dummy cycle
> > > > accuracy for those flashes prevents all SPI controllers that use tx
> > > > fif
pdf
>
> Signed-off-by: Bin Meng
> Acked-by: Alistair Francis
Thanks!
Applied to riscv-to-apply.next
Alistair
>
> ---
>
> Changes in v2:
> - rebase on qemu/master
>
> hw/block/m25p80.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/block
either can be plugged with -object.
> Rename them to "memory-region" and "iommu-memory-region".
>
> Signed-off-by: Markus Armbruster
Reviewed-by: Alistair Francis
Alistair
> ---
> include/exec/memory.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-
On Thu, Feb 11, 2021 at 12:15 AM Sai Pavan Boddu
wrote:
>
> From: Joel Stanley
>
> This assumes a specially constructued image:
>
> dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M
> dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc
> dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc c
On Thu, Feb 11, 2021 at 12:34 AM Sai Pavan Boddu
wrote:
>
> Embedded device slots should be allowed as support of eMMC is available.
>
> Signed-off-by: Sai Pavan Boddu
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/sd/sdhci.c | 4
> 1 file changed, 4 deletions(-
ric Le Goater
Acked-by: Alistair Francis
Alistair
> ---
> hw/sd/sd.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 55c1104..a2f39c9 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -658,6 +658,11 @@ static void sd_reset
On Thu, Feb 11, 2021 at 12:30 AM Sai Pavan Boddu
wrote:
>
> CID structure is little different for eMMC, w.r.t to product name and
> manufacturing date.
>
> Signed-off-by: Sai Pavan Boddu
> Signed-off-by: Edgar E. Iglesias
> ---
> hw/sd/sd.c | 52 +++--
On Thu, Feb 11, 2021 at 12:19 AM Sai Pavan Boddu
wrote:
>
> Add CMD35 and CMD36 which sets the erase start and end.
>
> Signed-off-by: Sai Pavan Boddu
> Signed-off-by: Edgar E. Iglesias
> ---
> hw/sd/sd.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index
gar E. Iglesias
Acked-by: Alistair Francis
Alistair
> ---
> hw/sd/sd.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index e3738b2..69289e0 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -1051,6 +1051,10 @@ static sd_rsp_t
On Thu, Feb 11, 2021 at 12:17 AM Sai Pavan Boddu
wrote:
>
> Add support to Power up the card and send response r3 in case of eMMC.
>
> Signed-off-by: Sai Pavan Boddu
> Signed-off-by: Edgar E. Iglesias
Acked-by: Alistair Francis
Alistair
> ---
> hw/sd/sd.c | 10 +++
On Thu, Feb 11, 2021 at 12:36 AM Sai Pavan Boddu
wrote:
>
> Configuring SDHCI-0 to act as eMMC controller.
>
> Signed-off-by: Sai Pavan Boddu
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/arm/xlnx-versal-virt.c | 16 +++-
> hw/arm/xlnx-versal.c | 1
On Thu, Feb 11, 2021 at 12:22 AM Sai Pavan Boddu
wrote:
>
> OCR.CARD_CAPACITY field is only valid for sd cards, So skip it for eMMC.
>
> Signed-off-by: Sai Pavan Boddu
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/sd/sd.c | 3 ++-
Cédric Le Goater
Reviewed-by: Alistair Francis
Alistair
> ---
> blockdev.c| 1 +
> include/sysemu/blockdev.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/blockdev.c b/blockdev.c
> index b250b9b..593ce44 100644
> --- a/blockdev.c
> +++
link: https://bugs.launchpad.net/qemu/+bug/1892960
Isn't this already fixed?
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
> ---
>
> hw/sd/sdhci.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhc
thus can not be run under KVM. Therefore restrict
> this test to TCG.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> Cc: Alistair Francis
> Cc: "Edgar E. Iglesias"
> Cc: Vikram Garhwal
> ---
> tests/qtest/mes
gned-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> default-configs/devices/arm-softmmu.mak | 1 -
> default-configs/devices/riscv32-softmmu.mak | 1 -
> default-configs/devices/riscv64-softmmu.mak | 1 -
> target/arm/Kconfig
f-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> default-configs/devices/arm-softmmu.mak | 1 -
> default-configs/devices/riscv32-softmmu.mak | 1 -
> default-configs/devices/riscv64-softmmu.mak | 1 -
> 3 files changed, 3 deletions(-)
>
> dif
On Thu, Dec 31, 2020 at 3:35 AM Bin Meng wrote:
>
> From: Bin Meng
>
> Import CRC16 calculation routines from Linux kernel v5.10:
>
> include/linux/crc-ccitt.h
> lib/crc-ccitt.c
>
> to QEMU:
>
> include/qemu/crc-ccitt.h
> util/crc-ccitt.c
>
> Si
e-specific options
> - Running Linux kernel
> - Running VxWorks kernel
> - Running U-Boot, and with an alternate configuration
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
>
> ---
>
> docs/system/riscv/sifive_u.rst | 336 +++
f-by: Bin Meng
This is great! Thanks!
Reviewed-by: Alistair Francis
Alistair
> ---
>
> docs/system/target-riscv.rst | 62
> docs/system/targets.rst | 1 +
> 2 files changed, 63 insertions(+)
> create mode 100644 docs/system/target-ris
On Thu, Dec 31, 2020 at 3:50 AM Bin Meng wrote:
>
> From: Bin Meng
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> docs/system/targets.rst | 19 ---
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --g
On Thu, Dec 31, 2020 at 3:38 AM Bin Meng wrote:
>
> From: Bin Meng
>
> All other peripherals' IRQs are in the format of decimal value.
> Change SIFIVE_U_GEM_IRQ to be consistent.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
&g
t;
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> include/hw/riscv/sifive_u.h | 3 +++
> hw/riscv/sifive_u.c | 43 +++--
> hw/riscv/Kconfig| 1 +
> 3 files changed, 45 insertions(+), 2 deletio
ommand line:
>
> $ qemu-system-riscv64 -nographic -M sifive_u,msel=6 -smp 5 -m 8G \
> -bios u-boot-spl.bin -drive file=spi-nor.img,if=mtd
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> include/hw/riscv/sifive_u.h | 4 +++
> hw
On Thu, Dec 31, 2020 at 3:36 AM Bin Meng wrote:
>
> From: Bin Meng
>
> This adds the SiFive SPI controller model for the FU540 SoC.
> The direct memory-mapped SPI flash mode is unsupported.
>
> Signed-off-by: Bin Meng
> ---
>
> include/hw/ssi/sifive_spi.h | 47 ++
> hw/ssi/sifive_spi.c
p tran
> tocken is used to signal the card.
>
> Emulating this by manually sending a CMD12 to the SD card core, to
> bring it out of the receiving data state.
>
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
> ---
>
> hw/sd/ssi-sd.c | 26 ++
On Thu, Dec 31, 2020 at 3:46 AM Bin Meng wrote:
>
> From: Bin Meng
>
> QEMU conding convention prefers spaces over tabs.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> include/hw/sd/sd.h | 42 +
en.
>
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
> ---
>
> hw/sd/ssi-sd.c | 37 -
> 1 file changed, 36 insertions(+), 1 deletion(-)
>
> diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
> index 8eb48550cf..21a96e91f
On Thu, Dec 31, 2020 at 3:44 AM Bin Meng wrote:
>
> From: Bin Meng
>
> At present there is a data_ready() callback for the SD data read
> path. Let's add a receive_ready() for the SD data write path.
>
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
; data block transfer fails in guest software because the expected
> CRC16 is missing on the data out line.
>
> Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
> ---
>
> hw/sd/ssi-sd.c | 1
On Thu, Dec 31, 2020 at 3:42 AM Bin Meng wrote:
>
> From: Bin Meng
>
> At present the single/multiple block write in SPI mode is blocked
> by sd_normal_command(). Remove the limitation.
>
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
> ---
>
>
On Thu, Dec 31, 2020 at 3:38 AM Bin Meng wrote:
>
> From: Bin Meng
>
> At present the codes use hardcoded numbers (0xff/0xfe) for the dummy
> value and block start token. Replace them with macros, and add more
> tokens for multiple block write.
>
> Signed-off-by: Bin Meng
Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
> ---
>
> hw/sd/sd.c | 47 ---
> 1 file changed, 47 deletions(-)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 52c7217fe1..1ada616e1e 100644
> --- a/hw/sd/sd.c
&g
wrong command index for STOP_TRANSMISSION,
> the required command to interupt the multiple block read command,
> in the old codes. It should be CMD12 (0x4c), not CMD13 (0x4d).
>
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
> ---
>
> hw/sd/ssi-sd.c | 15 ---
>
On Thu, Dec 31, 2020 at 3:32 AM Bin Meng wrote:
>
> From: Bin Meng
>
> This updates the flash information table to include various ISSI
> flashes that are supported by upstream U-Boot and Linux kernel.
>
> Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Alistair
On Mon, Jan 4, 2021 at 7:50 PM Bin Meng wrote:
>
> On Wed, Dec 23, 2020 at 10:00 AM Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > When write is disabled, the write to flash should be avoided
> > in flash_write8().
> >
> > Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device"
On Wed, Dec 2, 2020 at 3:09 PM Bin Meng wrote:
>
> Hi Alistair,
>
> On Thu, Dec 3, 2020 at 3:52 AM Alistair Francis wrote:
> >
> > On Sun, Nov 29, 2020 at 6:55 PM Bin Meng wrote:
> > >
> > > From: Bin Meng
> > >
> > > SST flashes req
On Sun, Nov 29, 2020 at 6:55 PM Bin Meng wrote:
>
> From: Bin Meng
>
> SST flashes require a dummy byte after the address bits.
>
> Signed-off-by: Bin Meng
I couldn't find a datasheet that says this... But the actual code
change looks fine, so:
Acked-by: Alis
-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> Since v1:
> - renamed argument 'bufptr' (Peter Maydell)
> ---
> include/qemu-common.h| 3 ++-
> hw/dma/xlnx_dpdma.c | 2 +-
> hw/net/fsl_etsec/etsec.c | 2 +-
> hw/sd/sd.c
On Thu, Aug 20, 2020 at 2:56 PM Eduardo Habkost wrote:
>
> While trying to convert TypeInfo declarations to the new
> OBJECT_DECLARE* macros, I've stumbled on a few suspicious cases
> where instance_size or class_size is not set, despite having type
> checker macros that use a specific type.
>
> T
On Mon, Aug 17, 2020 at 11:12 AM via wrote:
>
> Hi Anup,
>
> On 8/17/20 11:30 AM, Bin Meng wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > Hi Anup,
> >
> > On Sat, Aug 15, 2020 at 1:44 AM Anup Patel wrote:
> >> On Fri, Aug 14, 202
irn
> Signed-off-by: Dmitry Fomichev
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/scsi/scsi-generic.c | 10 ++
> include/scsi/constants.h | 1 +
> 2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/hw/scsi/scsi-generic.c b/hw/scsi/scsi-generi
size '
> (note that this will lose data if you make the image smaller than it
> currently is).
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> Since v1:
> Addressed Alistair & Peter comments (error_append_hint message)
&g
f the tests using SD cards.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> Since v1: Addressed review comments
> - truncate -> expand reword (Alistair Francis)
> - expand after uncompress (Niek Linnenbank)
> ---
&g
t;
> Signed-off-by: Niek Linnenbank
> Reviewed-by: Philippe Mathieu-Daudé
> Message-Id: <20200712183708.15450-1-nieklinnenb...@gmail.com>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> docs/system/arm/orangepi.rst | 16 +++
FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 |
> CANCEL 0
> JOB TIME : 90.02 s
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> tests/acceptance/boot_linux_console.py | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --gi
On Thu, Jul 9, 2020 at 7:35 AM Philippe Mathieu-Daudé wrote:
>
> On 7/9/20 4:15 PM, Peter Maydell wrote:
> > On Thu, 9 Jul 2020 at 14:56, Philippe Mathieu-Daudé wrote:
> >>
> >> On 7/7/20 10:29 PM, Niek Linnenbank wrote:
> >>> So I manually copy & pasted the change into hw/sd/sd.c to test it.
> >
On Tue, Jul 7, 2020 at 6:22 AM Philippe Mathieu-Daudé wrote:
>
> QEMU allows to create SD card with unrealistic sizes. This could work,
> but some guests (at least Linux) consider sizes that are not a power
> of 2 as a firmware bug and fix the card size to the next power of 2.
>
> Before CVE-2020-
n Tue, Jul 7, 2020 at 6:21 AM Philippe Mathieu-Daudé wrote:
>
> In the next commit we won't allow SD card images with invalid
> size (not aligned to a power of 2). Prepare the tests: add the
> pow2ceil() and image_pow2ceil_truncate() methods and truncate
> the images of the tests using SD cards.
>
On Tue, Jun 30, 2020 at 6:46 AM Philippe Mathieu-Daudé wrote:
>
> We don't need to check if sd->blk is set twice.
>
> Reviewed-by: Peter Maydell
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/sd/sd.c | 10 +-
&g
On Tue, Jun 30, 2020 at 6:44 AM Philippe Mathieu-Daudé wrote:
>
> Having 'base address' and 'relative offset' displayed
> separately is more helpful than the absolute address.
>
> Reviewed-by: Peter Maydell
> Signed-off-by: Philippe Mathieu-Daudé
Re
On Mon, Jun 8, 2020 at 10:48 AM Philippe Mathieu-Daudé
wrote:
>
> Hi Alistair,
>
> On 6/5/20 12:22 PM, Philippe Mathieu-Daudé wrote:
> > Patches 2 & 3 fix CVE-2020-13253.
> > The rest are (accumulated) cleanups.
> >
> > Supersedes: <20200604182502.24228-1-f4...@amsat.org>
> >
> > Philippe Mathieu-
On Tue, Jun 30, 2020 at 6:51 AM Philippe Mathieu-Daudé wrote:
>
> From: Philippe Mathieu-Daudé
>
> I/O request length can not be negative.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
> v4: Use uint32_t (pm215)
> --
On Tue, Jun 30, 2020 at 6:44 AM Philippe Mathieu-Daudé wrote:
>
> cmd_valid_while_locked() only needs to read SDRequest->cmd,
> pass it directly and make it const.
>
> Reviewed-by: Peter Maydell
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Ali
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