Neil Conway <[EMAIL PROTECTED]> writes:
> Granted, but I think you've mostly conceded my point: every _subsequent_
> time TAS() is invoked, the non-locking test is a clear win (with the
> possible exception of PPC).
I'm not real sure. One point here is that the standard advice about
this stuff is
On Mon, 2004-10-18 at 11:53, Tom Lane wrote:
> Only once we've begun to spin. The first time through, it's not at all
> clear whether the extra test is worthwhile --- it's certainly a win if
> the lock is always already held, and certainly a loss if the lock is
> always free
Granted, but I think
On Sun, Oct 17, 2004 at 11:16:50PM +1000, Neil Conway wrote:
> Currently, the assembly for TAS() on x86 does a non-locking test before
> using an atomic operation to attempt to acquire the spinlock:
>
> __asm__ __volatile__(
> " cmpb$0,%1 \n"
> "
Neil Conway <[EMAIL PROTECTED]> writes:
> On Mon, 2004-10-18 at 04:13, Tom Lane wrote:
>> Do you have any actual evidence for that opinion? ISTM this is
>> dependent on a large set of assumptions about the CPU's bus behavior,
>> boiling down to the conclusion that an extra conditional branch is
>>
On Mon, 2004-10-18 at 04:13, Tom Lane wrote:
> Do you have any actual evidence for that opinion? ISTM this is
> dependent on a large set of assumptions about the CPU's bus behavior,
> boiling down to the conclusion that an extra conditional branch is
> cheaper than a locked bus cycle.
I think the
Neil Conway <[EMAIL PROTECTED]> writes:
> Currently x86 is the only platform on which we do this -- ISTM that all
> the other platforms that implement spinlocks via atomic operations could
> benefit from this technique.
Do you have any actual evidence for that opinion? ISTM this is
dependent on
Currently, the assembly for TAS() on x86 does a non-locking test before
using an atomic operation to attempt to acquire the spinlock:
__asm__ __volatile__(
" cmpb$0,%1 \n"
" jne 1f \n"
" lock\n"
