Tom Lane wrote:
> Bruce Momjian <[EMAIL PROTECTED]> writes:
> > it certainly seems like it would be a good idea to have the 8k buffers
> > aligned on 4k offsets.
>
> Why? What mechanism do you expect would find that more efficient?
There was the idea that some OS's can swap the pages in from ker
Bruce Momjian <[EMAIL PROTECTED]> writes:
> it certainly seems like it would be a good idea to have the 8k buffers
> aligned on 4k offsets.
Why? What mechanism do you expect would find that more efficient?
regards, tom lane
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I found this very interested, and realize we have shared buffers aligned
at 8-bytes in CVS.
However, I know if I allocate an 8k block, it will usually be aligned on
an 8k boundary, right? I know the i386 uses 4k memory pages, and it
certainly seems like it would be a good idea to have the 8k buf
Manfred Spraul <[EMAIL PROTECTED]> writes:
> Unfortunately it's the slower one: Intel cpus have a microcode fastpath
> for memcopies that are 8-byte aligned. This fastpath is around 50%
> faster than the manual copy that is used for "misaligned" (i.e. only
> 4-byte aligned) pointers.
Maybe it'd
Hi,
When analyzing the kernel profile from osdl dbt benchmarks, I noticed
that around 50% of the kernel time is spent in __copy_user_intel.
http://khack.osdl.org/stp/280060/profile/
This function is one of two functions that does the actual memory copy
from/to kernel space to/from user space.
U
