On Tue, Jul 30, 2024 at 3:46 AM Heikki Linnakangas wrote:
> Aside from performance, I find "volatile" difficult to reason about. I
> feel more comfortable with atomics and memory barriers.
I think nearly everyone feels more comfortable with atomics and memory
barriers. The semantics of volatile a
On 29/07/2024 22:59, Andres Freund wrote:
After being confused for a while, the explanation is fairly simple: We use
volatile and dereference the address:
static __inline__ int
tas(volatile slock_t *lock)
{
slock_t _res = 1;
__asm__ __volatile__(
" lock
