"Robert E. Bruccoleri" <[EMAIL PROTECTED]> writes:
> I tried another load of the databases with fsync off (-F to
> the postmaster), and I encountered at least one invalid page
> header. Is there code in Postgres that handles the buffer cache
> differently if fsync is off?
I don't believe so.
Dear Tom,
I tried another load of the databases with fsync off (-F to
the postmaster), and I encountered at least one invalid page
header. Is there code in Postgres that handles the buffer cache
differently if fsync is off? Could this be a timing issue, since -F
does make PostgreSQL run fas
Dear Tom,
>
>
> "Robert E. Bruccoleri" <[EMAIL PROTECTED]> writes:
> > Besides a no optimization compilation of 7.4.3, what else
> > would you recommend to explore this problem further? Thanks. --Bob
>
> I really haven't the foggiest where to look :-( I don't actually
> believe that it's a
"Robert E. Bruccoleri" <[EMAIL PROTECTED]> writes:
> Besides a no optimization compilation of 7.4.3, what else
> would you recommend to explore this problem further? Thanks. --Bob
I really haven't the foggiest where to look :-( I don't actually
believe that it's a spinlock problem; that wou
Dear Tom,
Besides a no optimization compilation of 7.4.3, what else
would you recommend to explore this problem further? Thanks. --Bob
Tom Lane writes:
>
>
> "Robert E. Bruccoleri" <[EMAIL PROTECTED]> writes:
> > Question: were there any significant changes made to the
> > buffer man
"Robert E. Bruccoleri" <[EMAIL PROTECTED]> writes:
> Question: were there any significant changes made to the
> buffer management code between 7.4 and 8.0 that would explain the
> difference?
There are some nontrivial changes, but none that I would regard as
likely to cause a multiprocessing
Dear All,
Thanks for responding. First of all, the Intel compiler does
not accept inline assembly code, so I substituted the following
compiler intrinsic in its place:
#if defined(__ia64__) || defined(__ia64) /* __ia64 used by ICC compiler? */
/* Intel Itanium */
#define HAS_TEST_AND_SET
Peter Eisentraut <[EMAIL PROTECTED]> writes:
> Tom Lane wrote:
>> But that code is gcc-only, and he's not using gcc.
> I think the icc compiler claims to be gcc-compatible in that area, so
> it's quite likely that the gcc assembler code would be used.
Oh, good point.
In that case it seems entir
Tom Lane wrote:
> But that code is gcc-only, and he's not using gcc.
I think the icc compiler claims to be gcc-compatible in that area, so
it's quite likely that the gcc assembler code would be used.
--
Peter Eisentraut
http://developer.postgresql.org/~petere/
---(end
Tom Lane wrote:
> Bruce Momjian <[EMAIL PROTECTED]> writes:
> > If you are sure your storage and memory are good, I can think of only
> > two other ideas. One is a gcc bug. You are running Itanium so it is
> > possible. The only other possibility I can think of is that that our
> > ia64 assemble
Bruce Momjian <[EMAIL PROTECTED]> writes:
> If you are sure your storage and memory are good, I can think of only
> two other ideas. One is a gcc bug. You are running Itanium so it is
> possible. The only other possibility I can think of is that that our
> ia64 assembler code is wrong. It is:
If you are sure your storage and memory are good, I can think of only
two other ideas. One is a gcc bug. You are running Itanium so it is
possible. The only other possibility I can think of is that that our
ia64 assembler code is wrong. It is:
static __inline__ int
tas
The following bug has been logged online:
Bug reference: 1208
Logged by: Robert E Bruccoleri
Email address: [EMAIL PROTECTED]
PostgreSQL version: 7.4
Operating system: Linux Advanced Server 2.1 and SGI ProPack 2.4
Description:Invalid page header
Details:
==
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