[OpenWrt-Devel] [PATCH 12/22 v2] ARM: dts: add top-level DT bindings for Cortina Gemini

This adds the top level SoC bindings for Cortina systems Gemini platforms. Cc: Janos Laube Cc: Paulius Zaleckas Cc: Hans Ulli Kroll Cc: Florian Fainelli Cc: devicet...@vger.kernel.org Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rename required property "intcon" to "interrupt-controll

Re: [OpenWrt-Devel] [PATCH 1/4] PCI: add DT bindings for Cortina Gemini PCI Host Bridge

On Tue, Jan 31, 2017 at 1:31 AM, Bjorn Helgaas wrote: >> +- bus-range: set to <0x00 0x00> (only root bus) > > Why is this limited to bus 0? Is everything completely soldered down > with no possibility of adding or replacing PCI devices? The interrupt-map > below suggests slots, though. If there

Re: [OpenWrt-Devel] [PATCH 1/4] PCI: add DT bindings for Cortina Gemini PCI Host Bridge

On Wed, Feb 1, 2017 at 5:02 PM, Rob Herring wrote: > On Sat, Jan 28, 2017 at 09:48:36PM +0100, Linus Walleij wrote: >> +Example: >> + >> +pci@5000 { >> + compatible = "cortina,gemini-pci"; >> + reg = <0x5000 0x100>; > > Config space is indirectly accessed? Yes it is a really anno

[OpenWrt-Devel] [LEDE-DEV] MT7620A WiFi issue - with a twist!

Hello LEDE / OpenWRT devs, I am requesting your help. First a little background… I am co-founder of an education technology charity, onebillion ( https://onebillion.org/ ). We build apps that enable children to learn to read and become basically numerate in their own l