Hi Birger,
On Fri, 2022-02-25 at 19:58 +0100, Birger Koblitz wrote:
> Hi Sander,
>
> I don't have the GS1900-48 at hand or even my records. I am on vacation and I
> will only
> be back in 10 days, we actually got stuck here in quarantine...
Have you been able to perform any checks by now to dis
Hi Sander,
I don't have the GS1900-48 at hand or even my records. I am on vacation and I
will only
be back in 10 days, we actually got stuck here in quarantine...
You can also test the GPIO access in U-Boot using md.l and mw.l using the the
indirect
access register. I tested this once for the i
On Tue, 2022-02-22 at 23:39 +0100, Birger Koblitz wrote:
> Hi,
>
> the information on the external GPIO resetting the board of
> the Zyxel GS1900-48 comes from the hardware configuration
> reported by the stock firmware. It says:
> GS1900# show board
> [...]
> == Reset =
> Type
Hi,
the information on the external GPIO resetting the board of
the Zyxel GS1900-48 comes from the hardware configuration
reported by the stock firmware. It says:
GS1900# show board
[...]
== Reset =
Type: GPIO
GPIO: EXT_5
[...]
Using the rtk gpio commands in u-boot this can be
On Mon, 2022-02-21 at 21:23 +0100, Birger Koblitz wrote:
> Hi,
> >
> > I just checked with my multimeter, and while the GPIO5 on the RTL8231 does
> > go high/low
> > when I set the output high/low from Linux, my device certainly doesn't
> > reset. The
> > other
> > GPIO lines on the chip do work
Hi,
I just checked with my multimeter, and while the GPIO5 on the RTL8231 does go
high/low
when I set the output high/low from Linux, my device certainly doesn't reset.
The other
GPIO lines on the chip do work, since SFP modules are correctly detected.
Birger, just to be sure, can you confirm
On Mon, Feb 21, 2022 at 08:33:06PM +0100, Sander Vanheule wrote:
> On Mon, 2022-02-21 at 12:09 +, Daniel Golle wrote:
> > On Mon, Feb 21, 2022 at 10:04:13AM +0100, Sander Vanheule wrote:
> > > On Sun, 2022-02-20 at 21:13 +0100, Birger Koblitz wrote:
> > > > Hi,
> > > >
> > > > during developme
On Mon, 2022-02-21 at 12:09 +, Daniel Golle wrote:
> On Mon, Feb 21, 2022 at 10:04:13AM +0100, Sander Vanheule wrote:
> > On Sun, 2022-02-20 at 21:13 +0100, Birger Koblitz wrote:
> > > Hi,
> > >
> > > during development I came across situations where the RTL839x
> > > SoC's own reset did not a
On Mon, Feb 21, 2022 at 10:04:13AM +0100, Sander Vanheule wrote:
> On Sun, 2022-02-20 at 21:13 +0100, Birger Koblitz wrote:
> > Hi,
> >
> > during development I came across situations where the RTL839x
> > SoC's own reset did not always completely reset its state.
> > U-Boot was no longer able to
Hi,
On 21/02/2022 10:04, Sander Vanheule wrote:
anymore. Even if it would work with the current driver, once the RTL8231 is
controlled through an MDIO bus (from a kernel perspective), things might change.
For me that would be a reason not to do it that way, because we will not be able
to suppor
On Sun, 2022-02-20 at 21:13 +0100, Birger Koblitz wrote:
> Hi,
>
> during development I came across situations where the RTL839x
> SoC's own reset did not always completely reset its state.
> U-Boot was no longer able to boot via tftp afterwards.
> This is the same situation we see on the RTL838x.
Hi Daniel,
I understand that. My preferred solution would be to leave this in
but comment the node out so that we can use it in the future once
we either have made the 8231 gpio driver do busy waiting and avoid
anything that sleeps, or fix libgpiod.
The intention is to have every switch use a gpi
On Sun, Feb 20, 2022 at 09:13:24PM +0100, Birger Koblitz wrote:
> Hi,
>
> during development I came across situations where the RTL839x
> SoC's own reset did not always completely reset its state.
> U-Boot was no longer able to boot via tftp afterwards.
> This is the same situation we see on the R
Hi,
during development I came across situations where the RTL839x
SoC's own reset did not always completely reset its state.
U-Boot was no longer able to boot via tftp afterwards.
This is the same situation we see on the RTL838x.
While users will hopefully never mess up the SoC as during
developm
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