Re: [OpenWrt-Devel] Handling a PHY that spans multiple PHY addresses

2011-04-10 Thread Jonas Gorski
On 10 April 2011 17:54, David Goodenough wrote: > and of course the Pro uses a different switch, the AR8216. Actually the AR8316 ;-). But similar to the ADM6996M/FC, the internal switch registers are accessed through the MDIO interface by reading and writing to special phy addresses. Regards Jon

Re: [OpenWrt-Devel] Handling a PHY that spans multiple PHY addresses

2011-04-10 Thread David Goodenough
and of course the Pro uses a different switch, the AR8216. David On Sunday 10 April 2011, Jonas Gorski wrote: > On 10 April 2011 12:09, Peter Lebbing wrote: > > So, do you have any ideas on the best way to properly handle this PHY > > that looks like 32 PHYs? > > Take a look at ar71xx, they def

Re: [OpenWrt-Devel] Handling a PHY that spans multiple PHY addresses

2011-04-10 Thread Jonas Gorski
On 10 April 2011 12:09, Peter Lebbing wrote: > So, do you have any ideas on the best way to properly handle this PHY that > looks > like 32 PHYs? Take a look at ar71xx, they define a (machine dependent) phy mask for each eth that says at which phy addresses a device may attach. e.g. the rs pro

[OpenWrt-Devel] Handling a PHY that spans multiple PHY addresses

2011-04-10 Thread Peter Lebbing
Hi guys, Normally, when you access an Ethernet PHY through an MDIO bus, you specify a 5-bit PHY address that selects one of the PHYs attached to the bus, and a 5-bit register address that addresses a register inside that PHY. The ADM6996FC and ADM6996M switch chips occupy this full address space: