Re: [OpenWrt-Devel] [PATCH v2] lantiq: fall back to a more appropriate default dsl firmware

Hi, On Fri, Dec 11, 2015 at 10:36 AM, John Crispin wrote: >> @@ -69,11 +72,12 @@ start_service() { >> eval "xtse_adsl=\"\${xtse_adsl_$annex}\"" >> if [ "${xtse_adsl}" ]; then >> xtse=$xtse_adsl >> + [ -z "${firmware}" ] && eval >> "firmware=/lib/firmware/\${

[OpenWrt-Devel] [PATCH v9 2/3] ar71xx: scan nand ubi partition for ath9k eeprom files

From: Chris R Blake The MR18 stores the ath9k eeprom values on the NAND. This patch makes it possible to retrieve the images from there. Signed-off-by: Chris R Blake --- package/base-files/files/lib/functions/system.sh| 17 + .../etc/hotplug.d/firmware/10-ath9k-eeprom

[OpenWrt-Devel] [PATCH v9 1/3] ar71xx: refactor 10-ath9k-eeprom

From: Chris R Blake move all library includes and 'firmware already exists' check to the top of the script. Signed-off-by: Chris R Blake --- .../ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/lin

[OpenWrt-Devel] [PATCH v9 3/3] base-files: cleanup mtd_get_mac_binary hexdump

From: Chris R Blake Remove usage of dd, as per request from Yousong Zhou. Signed-off-by: Chris R Blake --- package/base-files/files/lib/functions/system.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[OpenWrt-Devel] [PATCH v9 0/3] complete Cisco MR18 support

This series completes the support for Cisco Meraki's MR18 router [0]. It features: CPU: Atheros/Qualcomm QCA9557-AT4A at 720MHz RAM: 128 MiB DDR2 NAND Flash: Hynix NAND 128MiB 3,3V 8-bit Wireless: SoC AR9550 + 2x Atheros AR9582-AR1A (one 5Ghz, other 2.4Ghz/5Ghz) Ethernet: 1x Gigabit AR8035-A, 802.3

Re: [OpenWrt-Devel] ramips: MT7621 all ethernet interrupts to CPU0?

On 18/12/2015 15:19, Cristian Morales Vega wrote: > I am far from an expert here. Somebody knows if this is to be expected? with the kernel now running the GIC we actually should have a fully functional irq affinity setup. might make sense to put the pic irqs on a secondary core > > root@OpenW

Re: [OpenWrt-Devel] ramips: MT7621 all ethernet interrupts to CPU0?

On 18/12/2015 15:19, Cristian Morales Vega wrote: > I am far from an expert here. Somebody knows if this is to be expected? yes > > root@OpenWrt:/tmp# cat /proc/irq/11/smp_affinity_list > 0-3 > root@OpenWrt:/tmp# cat /proc/interrupts >CPU0 CPU1 CPU2 CPU3 > 7:

[OpenWrt-Devel] ramips: MT7621 all ethernet interrupts to CPU0?

I am far from an expert here. Somebody knows if this is to be expected? root@OpenWrt:/tmp# cat /proc/irq/11/smp_affinity_list 0-3 root@OpenWrt:/tmp# cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 7: 211536 211092 211160 212477 MIPS 7 timer 11:

[OpenWrt-Devel] [PATCH] libnl: fix warning with poll.h include on musl

Warning is: #warning redirecting incorrect #include to --- .../libnl/patches/001-fix-poll-h-include-warning-on-musl.h | 13 + 1 file changed, 13 insertions(+) create mode 100644 package/libs/libnl/patches/001-fix-poll-h-include-warning-on-musl.h diff --git a/package/libs/libnl