Re: [Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Simon Barner
Hi, > Thanks for testing the patches. So, a significant speed-up (~50%) due to > the async patches, great. I believe the actual flashing is now mostly > limited by flash write speed of the STM32F1x (~39 KiB/s => about 1.2 > seconds for your file) and that there's not much more that can be done >

Re: [Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Andreas Fritiofson
On Thu, Aug 4, 2011 at 5:12 PM, Simon Barner wrote: > I applied the patches 1/5 - 5/5 against my fixed ARM-JTAG-EW driver > and yield now (STM32F107, JTAG @ 6 MHz). Also, debugging the target > seems to work decently. > > flash erase_address 0x0800 0x4 > erased address 0x0800 (length

Re: [Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Simon Barner
Andreas, list, On 04.08.2011 09:46, Simon Barner wrote: > On 04.08.2011 09:30, Simon Barner wrote: >> Some further benchmarks (OpenOCD compiled without any additional logging): >> >> @ 32 KHz: 1.9 kb/s >> @ 64 KHz: 3.4 kb/s >> @ 125 KHz: 5.6 kb/s >> @ 250 KHz: 8.1 kb/s >> @ 500 KHz: 10.2 kb/s >> @

Re: [Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Simon Barner
On 04.08.2011 09:30, Simon Barner wrote: > Some further benchmarks (OpenOCD compiled without any additional logging): > > @ 32 KHz: 1.9 kb/s > @ 64 KHz: 3.4 kb/s > @ 125 KHz: 5.6 kb/s > @ 250 KHz: 8.1 kb/s > @ 500 KHz: 10.2 kb/s > @ 1MHz: 11.8 kb/s > @ 2MHz: 12.9 kb/s > @ 4MHz: 13.4 kb/s > @ 6MHz:

[Openocd-development] Clock setup for STM32F107

2011-08-04 Thread Simon Barner
Hi, inspired by this post, I created a reset-init script that initializes the system clock for the STM32F107 (connectivity line) and sets the JTAG speed to 6 MHz. Currently, I source it in my custom configuration s