Raúl Sánchez Siles wrote:
> Hello All:
>
> Thanks a lot for the prompt answers, unlike this e-mail. I've been off from
> the office since my post, so sorry for it.
>
> I now notice I failed to provide sufficient details about the issue at
> discussion. The flash uses is a 16bit data width,
Hello All:
Thanks a lot for the prompt answers, unlike this e-mail. I've been off from
the office since my post, so sorry for it.
I now notice I failed to provide sufficient details about the issue at
discussion. The flash uses is a 16bit data width, but it is connected using
just 8 bit
> -Oorspronkelijk bericht-
> Van: David Brownell [mailto:davi...@pacbell.net]
> Verzonden: donderdag 14 mei 2009 23:02
> Aan: Nico Coesel
> CC: openocd-development@lists.berlios.de; Raúl Sánchez Siles
> Onderwerp: Re: [Openocd-development] CFI driver chip/bus width.
&
On Thursday 14 May 2009, Nico Coesel wrote:
> Anyway, if your flash is 8 bit, then your bus must be
> 8 bits wide.
Not true; there *is* support, e.g. in Linux, for hooking
up two 8-bit NOR chips in parallel. I think one of the
ideas is to improve the read/write bandwidth.
> It is not clear w
Raúl,
I posted a patch that does take the bus and chip width into account a short
while ago. Anyway, if your flash is 8 bit, then your bus must be 8 bits wide.
It is not clear whether you have two 8 bit flashes in parallel to form a 16 bit
flash.
Nico
Hello all:
I have noticed some issu
Raúl Sánchez Siles wrote:
> Hello all:
>
> I have noticed some issues on CFI flash driver related to chip and bus
> width
> affecting read and writes.
>
> The system I'm dealing with is based on a Vitesse switch chip which embeds
> an ARM926ejs processor. It additionally provides RAM and
Hello all:
I have noticed some issues on CFI flash driver related to chip and bus width
affecting read and writes.
The system I'm dealing with is based on a Vitesse switch chip which embeds
an ARM926ejs processor. It additionally provides RAM and flash controller. In
this case we are us
