Hi all,
I could not enter debug state when I set DRCR[0] to "b1", And I get the
DSCR[1:0] value is "b10"
any idea?
DRCR:Debug Run Control Register
DSCR:Debug Status and Control Register
these registers is on page 12.4.12 of Cortex-A8 TRM
Best Regards,
Ray
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Hi all,
Can't enter debug state as setting cortex-a8 register of DRCR as below ,Any
idea?
> mww 0x54011090 1
setting DRCR halt request bit
> mdw 0x54011088
0x54011088 4b072002. .K
reading DSCR,but core still restarted
Best Regards,
Ray
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Trying to access Debug Reister Interface with mdw I get
> omap3.cpu mdw 0x54011d00
0x54011d00 411fc082...A
Looking at Cortex-A8 TRM, it seems OK.
> omap3.cpu mdw 0x54011088
AHBAP Cached values: dp_select 0x0, ap_csw 0xc3800042, ap_tar 0x54011088
SWJ-DP ST