[Openocd-development] How to enter into debug state of Cortex-A8‏?

2009-05-06 Thread tangray
Hi all, I could not enter debug state when I set DRCR[0] to "b1", And I get the DSCR[1:0] value is "b10" any idea? DRCR:Debug Run Control Register DSCR:Debug Status and Control Register these registers is on page 12.4.12 of Cortex-A8 TRM Best Regards, Ray ___

Re: [Openocd-development] How to go on with Cortex-A8 support

2009-05-05 Thread tangray
Hi all, Can't enter debug state as setting cortex-a8 register of DRCR as below ,Any idea? > mww 0x54011090 1 setting DRCR halt request bit > mdw 0x54011088 0x54011088 4b072002. .K reading DSCR,but core still restarted Best Regards, Ray ___

Re: [Openocd-development] How to go on with Cortex-A8 support‏

2009-05-04 Thread tangray
Trying to access Debug Reister Interface with mdw I get > omap3.cpu mdw 0x54011d00 0x54011d00 411fc082...A Looking at Cortex-A8 TRM, it seems OK. > omap3.cpu mdw 0x54011088 AHBAP Cached values: dp_select 0x0, ap_csw 0xc3800042, ap_tar 0x54011088 SWJ-DP ST