On Mon, Dec 2, 2024 at 5:14 PM Randy MacLeod
wrote:
>
> On 2024-12-02 6:50 p.m., Khem Raj wrote:
>
> On Mon, Dec 2, 2024 at 3:14 PM Randy MacLeod via
> lists.openembedded.org
> wrote:
>
> On 2024-12-01 11:35 p.m., deepthi.hem...@windriver.com wrote:
>
> From: Deepthi Hemraj
>
> RISC-V offers sev
On 2024-12-02 6:50 p.m., Khem Raj wrote:
On Mon, Dec 2, 2024 at 3:14 PM Randy MacLeod via
lists.openembedded.org
wrote:
On 2024-12-01 11:35 p.m.,deepthi.hem...@windriver.com wrote:
From: Deepthi Hemraj
RISC-V offers several virtual memory address schemes (Sv39, Sv48, and Sv57),
but ASan curre
On Mon, Dec 2, 2024 at 3:14 PM Randy MacLeod via
lists.openembedded.org
wrote:
>
> On 2024-12-01 11:35 p.m., deepthi.hem...@windriver.com wrote:
>
> From: Deepthi Hemraj
>
> RISC-V offers several virtual memory address schemes (Sv39, Sv48, and Sv57),
> but ASan currently supports only Sv39 on RIS
On 2024-12-01 11:35 p.m., deepthi.hem...@windriver.com wrote:
From: Deepthi Hemraj
RISC-V offers several virtual memory address schemes (Sv39, Sv48, and Sv57),
but ASan currently supports only Sv39 on RISC-V64.
For RISC-V64 Sv39, ASan uses custom allocator configurations
tuned to manage large al
From: Deepthi Hemraj
RISC-V offers several virtual memory address schemes (Sv39, Sv48, and Sv57),
but ASan currently supports only Sv39 on RISC-V64.
For RISC-V64 Sv39, ASan uses custom allocator configurations
tuned to manage large allocations efficiently.
These tunings are incompatible with larg
