Alexander Monakov (3):
overhaul environment functions
free allocations in clearenv
fix OOB reads in Xbyte_memmem
Bartosz Brachaczek (1):
handle whitespace before %% in scanf
Rich Felker (6):
fix erroneous stop before input limit in mbsnrtowcs and wcsnrtombs
fix
On 2017-09-05 10:59 AM, Richard Purdie wrote:
On Tue, 2017-09-05 at 10:24 -0400, Bruce Ashfield wrote:
On 09/05/2017 10:13 AM, Richard Purdie wrote:
Hi Bruce,
We had a locked up qemuppc lsb image and I was able to find
backtraces
from the serial console log (/home/pokybuild/yocto-
autobuilder
ping
On 09/07/2017 10:37 AM, Chen Qi wrote:
The following changes since commit 8b4f16a9cbbaf521461f699b7264fac2ac872581:
mesa-gl: Fix build after recent mesa PACKAGECONFIG changes (2017-09-05
15:01:02 +0100)
are available in the git repository at:
git://git.pokylinux.org/poky-contrib C
ping
On 09/06/2017 12:54 PM, Chen Qi wrote:
The following changes since commit 8b4f16a9cbbaf521461f699b7264fac2ac872581:
mesa-gl: Fix build after recent mesa PACKAGECONFIG changes (2017-09-05
15:01:02 +0100)
are available in the git repository at:
git://git.pokylinux.org/poky-contrib C
ping
On 09/05/2017 05:55 PM, Chen Qi wrote:
In OE core, we had the assumption that multiple syslog daemons could be
installed
at the same time. We did some work to cope with this assumption, including
using update-alternatives to manage syslog related files.
In meta-openembedded, rsyslog and s
ping
On 09/05/2017 04:07 PM, Chen Qi wrote:
The following changes since commit 15eac6befb6c4d16bc1b814e040bd7bf006a5bee:
linux-yocto: add linux-yocto 4.12 bbappends (2017-08-31 23:37:10 +0100)
are available in the git repository at:
git://git.pokylinux.org/poky-contrib ChenQi/systemd-se
From: sweeaun
Modified ostable and tupletable to support muslx32 build.
Signed-off-by: sweeaun
---
.../dpkg/0001-dpkg-Support-muslx32-build.patch | 41 ++
meta/recipes-devtools/dpkg/dpkg_1.18.24.bb | 1 +
2 files changed, 42 insertions(+)
create mode 100644
m
Arachne Place and Route provides tools to complete the place and route
step for iCE40 FPGAs. This allows for processing synthesised designs
from Yosys, and generating netlist output which can be processed by
IceStorm.
Signed-off-by: Nathan Rossi
---
.../arachne-pnr/arachne-pnr_git.bb
IceStorm includes tools for packing iCE40 designs into bitstreams as
well as the data used in place and route tooling. Also included in
IceStorm is JTAG programming (which uses libftdi) and other helper tools
to generate iCE40 HDL and verify timing constraints.
Signed-off-by: Nathan Rossi
---
me
Icarus Verilog is a multi-purpose tool for simulation and synthesis of
Verilog. It is also useful for linting verilog and other tasks.
Signed-off-by: Nathan Rossi
---
.../icarus-verilog/icarus-verilog_git.bb | 33 ++
1 file changed, 33 insertions(+)
create mode 100
This series contains a set of a recipes for Open Source FPGA tools which
provide a full Verilog to target Bitstream flow for the Lattice iCE40
FPGAs.
This includes the following tools:
* Yosys - Synthesis
* Arachne-PNR - Place and Route
* IceStorm - Bitmapping and JTAG programming
Also include
Yosys provides a Open Source Verilog synthesis flow for a number of
targets including Altera, ASIC flows, Lattice FPGAs/CPLDs, Xilinx, etc.
This tool provides the first step in a fully open source HDL/Verilog to
bitstream flow.
Also included is its primary dependency Berkeley ABC which is used for
Also update the ASSUME_PROVIDED in bitbake.conf to contain gawk-native
as the dependency is passed in via HOSTTOOLS for native builds.
This allows for recipes to depend on gawk-native, and have the
dependency met if not already provided by the host tools.
Signed-off-by: Nathan Rossi
---
meta/co
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