tween rx_skbuff_head, the
aligned head of the buffer, and the packet data, rx_skbuff_dma.
Tested on a Creator Ci40 with Pistachio SoC.
Signed-off-by: Matt Redfearn
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 +
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 50 -
Hi David,
Thanks for your feedback.
On 23/09/17 02:26, David Miller wrote:
From: Matt Redfearn
Date: Fri, 22 Sep 2017 12:13:53 +0100
According to Documentation/DMA-API.txt:
Warnings: Memory coherency operates at a granularity called the cache
line width. In order for memory mapped by
Hi David,
On 26/05/17 01:38, David Daney wrote:
Instead of doing a linear search through the insn_table for each
instruction, use the opcode as direct index into the table. This will
give constant time lookup performance as the number of supported
opcodes increases. Make the tables const as t
