On Fri, May 17, 2019 at 11:10:10AM -0700, Florian Fainelli wrote:
> On 5/17/19 11:03 AM, Russell King - ARM Linux admin wrote:
> > On Fri, May 17, 2019 at 05:37:00PM +, Ioana Ciornei wrote:
> >>> Subject: Re: dsa: using multi-gbps speeds on CPU port
> >>>
>
On 5/17/19 11:03 AM, Russell King - ARM Linux admin wrote:
> On Fri, May 17, 2019 at 05:37:00PM +, Ioana Ciornei wrote:
>>> Subject: Re: dsa: using multi-gbps speeds on CPU port
>>>
>>> Hi everyone,
>>>
>>> On Wed, 15 May 2019 09:09:26 -0700
&g
On Fri, May 17, 2019 at 05:37:00PM +, Ioana Ciornei wrote:
> > Subject: Re: dsa: using multi-gbps speeds on CPU port
> >
> > Hi everyone,
> >
> > On Wed, 15 May 2019 09:09:26 -0700
> > Florian Fainelli wrote:
> >
> > >On 5/15/19
> Subject: Re: dsa: using multi-gbps speeds on CPU port
>
> Hi everyone,
>
> On Wed, 15 May 2019 09:09:26 -0700
> Florian Fainelli wrote:
>
> >On 5/15/19 7:02 AM, Maxime Chevallier wrote:
> >> Hi Andrew,
> >>
> >> On Wed, 15 May 2019 15:2
Hi everyone,
On Wed, 15 May 2019 09:09:26 -0700
Florian Fainelli wrote:
>On 5/15/19 7:02 AM, Maxime Chevallier wrote:
>> Hi Andrew,
>>
>> On Wed, 15 May 2019 15:27:01 +0200
>> Andrew Lunn wrote:
>>
>>> I think you are getting your terminology wrong. 'master' is eth0 in
>>> the example you g
> My basic idea is to interface a Raspberry Pi-like board to a dumb
> "switch evaluation board" which has only the Ethernet ports and the
> SPI/whatever control interface exposed. The DSA CPU/master port combo
> in this case would go through a Cat5 cable, which is not going to pan
> out very well c
On Wed, 15 May 2019 at 19:19, Russell King - ARM Linux admin
wrote:
>
> On Wed, May 15, 2019 at 09:09:26AM -0700, Florian Fainelli wrote:
> > Vladimir mentioned a few weeks ago that he is considering adding support
> > for PHYLIB and PHYLINK to run without a net_device instance, you two
> > should
On Wed, May 15, 2019 at 09:09:26AM -0700, Florian Fainelli wrote:
> Vladimir mentioned a few weeks ago that he is considering adding support
> for PHYLIB and PHYLINK to run without a net_device instance, you two
> should probably coordinate with each other and make sure both of your
> requirements
On Wed, May 15, 2019 at 03:27:01PM +0200, Andrew Lunn wrote:
> On the master interface, the armada 8040, eth0, you still need
> something. However, if you look at phylink_parse_fixedlink(), it puts
> the speed etc into a phylink_link_state. It never instantiates a
> fixed-phy. So i think that could
On 5/15/19 7:02 AM, Maxime Chevallier wrote:
> Hi Andrew,
>
> On Wed, 15 May 2019 15:27:01 +0200
> Andrew Lunn wrote:
>
>> I think you are getting your terminology wrong. 'master' is eth0 in
>> the example you gave above. CPU and DSA ports don't have netdev
>> structures, and so any PHY used wit
Hi Andrew,
On Wed, 15 May 2019 15:27:01 +0200
Andrew Lunn wrote:
>I think you are getting your terminology wrong. 'master' is eth0 in
>the example you gave above. CPU and DSA ports don't have netdev
>structures, and so any PHY used with them is not corrected to a
>netdev.
Ah yes sorry, I'm stil
On Wed, May 15, 2019 at 02:39:36PM +0200, Maxime Chevallier wrote:
> Hello everyone,
>
> I'm working on a setup where I have a 88e6390X DSA switch connected to
> a CPU (an armada 8040) with 2500BaseX and RXAUI interfaces (we only use
> one at a time).
Hi Maxime
RXAUI should just work. By default
Hello everyone,
I'm working on a setup where I have a 88e6390X DSA switch connected to
a CPU (an armada 8040) with 2500BaseX and RXAUI interfaces (we only use
one at a time).
I'm facing a limitation with the current way to represent that link,
where we use a fixed-link description in the CPU port
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