Re: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function

2020-09-27 Thread Marc Kleine-Budde
On 9/28/20 7:23 AM, Joakim Zhang wrote: + for (i = 0; i < ram_init[0].len; i++) + priv->write(0, (void __iomem *)regs + ram_init[0].offset + +sizeof(u32) * i); >>> >>> As the write function only does endian conversion, and you're writing 0 >>> here. >>> What about using io

RE: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function

2020-09-27 Thread Joakim Zhang
> -Original Message- > From: Joakim Zhang > Sent: 2020年9月28日 10:29 > To: Marc Kleine-Budde ; linux-...@vger.kernel.org > Cc: dl-linux-imx ; netdev@vger.kernel.org > Subject: RE: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for > ECC > function

RE: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function

2020-09-27 Thread Joakim Zhang
> -Original Message- > From: Marc Kleine-Budde > Sent: 2020年9月28日 3:58 > To: Joakim Zhang ; linux-...@vger.kernel.org > Cc: dl-linux-imx ; netdev@vger.kernel.org > Subject: Re: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for > ECC > function

RE: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function

2020-09-27 Thread Joakim Zhang
> -Original Message- > From: Marc Kleine-Budde > Sent: 2020年9月28日 3:52 > To: Joakim Zhang ; linux-...@vger.kernel.org > Cc: dl-linux-imx ; netdev@vger.kernel.org > Subject: Re: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for > ECC > function

Re: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function

2020-09-27 Thread Marc Kleine-Budde
On 9/27/20 6:07 PM, Joakim Zhang wrote: [...] > +static void flexcan_init_ram(struct net_device *dev) > +{ > + struct flexcan_priv *priv = netdev_priv(dev); > + struct flexcan_regs __iomem *regs = priv->regs; > + u32 reg_ctrl2; > + int i; > + > + /* 11.8.3.13 Detection and corr

Re: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function

2020-09-27 Thread Marc Kleine-Budde
On 9/27/20 6:07 PM, Joakim Zhang wrote: > One issue was reported at a baremetal environment, which is used for > FPGA verification. "The first transfer will fail for extended ID > format(for both 2.0B and FD format), following frames can be transmitted > and received successfully for extended forma