David Brownell wrote:
On Monday 11 February 2008, Claudio Lanconelli wrote:
I have tried your latest patch. Only after the following change it
works fine (no more rx errors during ifconfig up).
Hmm, what chip rev do you have? Different errata and all.
ISTR mine is rev4; so, not the mo
On Monday 11 February 2008, Claudio Lanconelli wrote:
> I have tried your latest patch. Only after the following change it
> works fine (no more rx errors during ifconfig up).
Hmm, what chip rev do you have? Different errata and all.
ISTR mine is rev4; so, not the most current, but not the
oldest
David Brownell wrote:
> and in the enc28j60_net_close() after enc28j60_hw_disable().
> Probably we don't need to set_lowpower(false) in enc28j60_net_open() since
> it performs a soft reset with enc28j60_hw_init() (not sure).
The current patch sets the device in low power mode in hw_disab
On Thursday 07 February 2008, Claudio Lanconelli wrote:
> David Brownell wrote:
> > How long did that take? I did about four dozen
> >
> > ifconfig eth1 up
> > sleep 3
> > ifconfig eth1 down
> >
> > cycles ... it worked fine. The "sleep" was to let the link
> > negotiation complete.
>
David Brownell wrote:
How long did that take? I did about four dozen
ifconfig eth1 up
sleep 3
ifconfig eth1 down
cycles ... it worked fine. The "sleep" was to let the link
negotiation complete.
After a couple of :
ifconfig eth0 down
(wait just 1 second)
ifconfig
David Brownell wrote:
Prevent oops on enc28j60 packet RX: make sure buffers are aligned.
Not all architectures support unaligned accesses in kernel space.
Signed-off-by: David Brownell <[EMAIL PROTECTED]>
Acked-by: Claudio Lanconelli <[EMAIL PROTECTED]>
---
drivers/net/enc28j60.c |3
On Wednesday 06 February 2008, Claudio Lanconelli wrote:
> Good idea, but with your patch applied, after some ifconfig down -
> ifconfig up cycle, the
> enc28j60 is left in an unknown state and it doesn' Rx/Tx anything.
How long did that take? I did about four dozen
ifconfig eth1 up
> > Prevent unaligned packet oops on enc28j60 packet RX.
>
> How can I reproduce the unaligned packet oops?
Use any architecture that doesn't support unaligned accesses
in kernel space. I used AVR32 for this (it's got a pretty
solid SPI master controller driver). ARM isn't immune either,
and ther
David Brownell wrote:
From: David Brownell <[EMAIL PROTECTED]>
Prevent unaligned packet oops on enc28j60 packet RX.
How can I reproduce the unaligned packet oops? Did you use any utilities
to force this condition?
Keep enc28j60 chips in low-power mode when they're not in use.
At typically 1
From: David Brownell <[EMAIL PROTECTED]>
Prevent unaligned packet oops on enc28j60 packet RX.
Keep enc28j60 chips in low-power mode when they're not in use.
At typically 120 mA, these chips run hot even when idle. Low
power mode cuts that power usage by a factor of around 100.
Signed-off-by: Da
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