Re: [Resend RFC PATCH V2 04/12] HV: Add Write/Read MSR registers via ghcb

On Wed, Apr 14, 2021 at 10:49:37AM -0400, Tianyu Lan wrote: > From: Tianyu Lan > > Hyper-V provides GHCB protocol to write Synthetic Interrupt > Controller MSR registers and these registers are emulated by > Hypervisor rather than paravisor. What is paravisor? Is that the VMPL0 to borrow AMD spe

Re: [Resend RFC PATCH V2 04/12] HV: Add Write/Read MSR registers via ghcb

On 4/14/2021 11:41 PM, Christoph Hellwig wrote: +EXPORT_SYMBOL_GPL(hv_ghcb_msr_write); Just curious, who is going to use all these exports? These seems like extremely low-level functionality. Isn't there a way to build a more useful higher level API? Yes, will remove it.

Re: [Resend RFC PATCH V2 04/12] HV: Add Write/Read MSR registers via ghcb

> +EXPORT_SYMBOL_GPL(hv_ghcb_msr_write); Just curious, who is going to use all these exports? These seems like extremely low-level functionality. Isn't there a way to build a more useful higher level API?

[Resend RFC PATCH V2 04/12] HV: Add Write/Read MSR registers via ghcb

From: Tianyu Lan Hyper-V provides GHCB protocol to write Synthetic Interrupt Controller MSR registers and these registers are emulated by Hypervisor rather than paravisor. Hyper-V requests to write SINTx MSR registers twice(once via GHCB and once via wrmsr instruction including the proxy bit 21)