On 9/3/2020 1:09 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 21:35, Florian Fainelli pisze:
On 9/3/2020 12:21 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 19:17, Florian Fainelli pisze:
On 9/3/2020 10:13 AM, Adam Rudziński wrote:
W dniu 2020-09-03 o 17:21, Florian Fainelli pisze:
W dniu 2020-09-03 o 21:35, Florian Fainelli pisze:
On 9/3/2020 12:21 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 19:17, Florian Fainelli pisze:
On 9/3/2020 10:13 AM, Adam Rudziński wrote:
W dniu 2020-09-03 o 17:21, Florian Fainelli pisze:
On 9/2/2020 11:00 PM, Adam Rudziński wrote
On 9/3/2020 12:21 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 19:17, Florian Fainelli pisze:
On 9/3/2020 10:13 AM, Adam Rudziński wrote:
W dniu 2020-09-03 o 17:21, Florian Fainelli pisze:
On 9/2/2020 11:00 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 04:13, Florian Fainelli pisze
W dniu 2020-09-03 o 19:17, Florian Fainelli pisze:
On 9/3/2020 10:13 AM, Adam Rudziński wrote:
W dniu 2020-09-03 o 17:21, Florian Fainelli pisze:
On 9/2/2020 11:00 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 04:13, Florian Fainelli pisze:
On 9/2/2020 3:20 PM, Andrew Lunn wrote:
+
On 9/3/2020 10:13 AM, Adam Rudziński wrote:
W dniu 2020-09-03 o 17:21, Florian Fainelli pisze:
On 9/2/2020 11:00 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 04:13, Florian Fainelli pisze:
On 9/2/2020 3:20 PM, Andrew Lunn wrote:
+ priv->clk = devm_clk_get_optional(&phydev->mdio.d
W dniu 2020-09-03 o 17:21, Florian Fainelli pisze:
On 9/2/2020 11:00 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 04:13, Florian Fainelli pisze:
On 9/2/2020 3:20 PM, Andrew Lunn wrote:
+ priv->clk = devm_clk_get_optional(&phydev->mdio.dev, "sw_gphy");
+ if (IS_ERR(priv->clk))
+
On 9/2/2020 11:00 PM, Adam Rudziński wrote:
W dniu 2020-09-03 o 04:13, Florian Fainelli pisze:
On 9/2/2020 3:20 PM, Andrew Lunn wrote:
+ priv->clk = devm_clk_get_optional(&phydev->mdio.dev, "sw_gphy");
+ if (IS_ERR(priv->clk))
+ return PTR_ERR(priv->clk);
+
+ /* To get the
W dniu 2020-09-03 o 04:13, Florian Fainelli pisze:
On 9/2/2020 3:20 PM, Andrew Lunn wrote:
+ priv->clk = devm_clk_get_optional(&phydev->mdio.dev, "sw_gphy");
+ if (IS_ERR(priv->clk))
+ return PTR_ERR(priv->clk);
+
+ /* To get there, the mdiobus registration logic already enab
On 9/2/2020 3:20 PM, Andrew Lunn wrote:
+ priv->clk = devm_clk_get_optional(&phydev->mdio.dev, "sw_gphy");
+ if (IS_ERR(priv->clk))
+ return PTR_ERR(priv->clk);
+
+ /* To get there, the mdiobus registration logic already enabled our
+* clock otherwise we
> + priv->clk = devm_clk_get_optional(&phydev->mdio.dev, "sw_gphy");
> + if (IS_ERR(priv->clk))
> + return PTR_ERR(priv->clk);
> +
> + /* To get there, the mdiobus registration logic already enabled our
> + * clock otherwise we would not have probed this device since we
The internal Gigabit PHY on Broadcom STB chips has a digital clock which
drives its MDIO interface among other things, the driver now requests
and manage that clock during .probe() and .remove() accordingly.
Signed-off-by: Florian Fainelli
---
drivers/net/phy/bcm7xxx.c | 29 +
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