On Wed, Dec 19, 2018 at 05:44:07PM -0500, Jiong Wang wrote:
> Current eBPF ISA has 32-bit sub-register and has defined a set of ALU32
> instructions.
>
> However, there is no JMP32 instructions, the consequence is code-gen for
> 32-bit sub-registers is not efficient. For example, explicit sign-ext
Current eBPF ISA has 32-bit sub-register and has defined a set of ALU32
instructions.
However, there is no JMP32 instructions, the consequence is code-gen for
32-bit sub-registers is not efficient. For example, explicit sign-extension
from 32-bit to 64-bit is needed for signed comparison.
Adding
