Re: [PATCH v3 net-next v3 0/4] net: dsa: mv88e6xxx: rework reset and PPU code

2016-12-06 Thread David Miller
From: Vivien Didelot Date: Mon, 5 Dec 2016 17:30:24 -0500 > Old Marvell chips (like 88E6060) don't have a PHY Polling Unit (PPU). > > Next chips (like 88E6185) have a PPU, which has exclusive access to the > PHY registers, thus must be disabled before access. > > Newer chips (like 88E6352) hav

[PATCH v3 net-next v3 0/4] net: dsa: mv88e6xxx: rework reset and PPU code

2016-12-05 Thread Vivien Didelot
Old Marvell chips (like 88E6060) don't have a PHY Polling Unit (PPU). Next chips (like 88E6185) have a PPU, which has exclusive access to the PHY registers, thus must be disabled before access. Newer chips (like 88E6352) have an indirect mechanism to access the PHY registers whenever, thus loose