Re: [PATCH v3 1/5] net: phy: Add support for microchip SMI0 MDIO bus

2020-05-11 Thread Michael Grzeschik
On Sat, May 09, 2020 at 10:28:05AM -0700, Florian Fainelli wrote: On 5/8/2020 8:43 AM, Michael Grzeschik wrote: From: Andrew Lunn SMI0 is a mangled version of MDIO. The main low level difference is the MDIO C22 OP code is always 0, not 0x2 or 0x1 for Read/Write. The read/write information is

Re: [PATCH v3 1/5] net: phy: Add support for microchip SMI0 MDIO bus

2020-05-09 Thread Andrew Lunn
> > - mdiobb_cmd(ctrl, MDIO_WRITE, phy, reg); > > + mdiobb_cmd(ctrl, ctrl->op_c22_write, phy, reg); > > There are other users of the mdio-bitbang.c file which I believe you are > going to break here because they will not initialize op_c22_write or > op_c22_read, and thus they w

Re: [PATCH v3 1/5] net: phy: Add support for microchip SMI0 MDIO bus

2020-05-09 Thread Florian Fainelli
On 5/8/2020 8:43 AM, Michael Grzeschik wrote: From: Andrew Lunn SMI0 is a mangled version of MDIO. The main low level difference is the MDIO C22 OP code is always 0, not 0x2 or 0x1 for Read/Write. The read/write information is instead encoded in the PHY address. Extend the bit-bang code to a

[PATCH v3 1/5] net: phy: Add support for microchip SMI0 MDIO bus

2020-05-08 Thread Michael Grzeschik
From: Andrew Lunn SMI0 is a mangled version of MDIO. The main low level difference is the MDIO C22 OP code is always 0, not 0x2 or 0x1 for Read/Write. The read/write information is instead encoded in the PHY address. Extend the bit-bang code to allow the op code to be overridden, but default to