Hi Jakub,
On Mon, Dec 28, 2020 at 9:37 PM Jakub Kicinski wrote:
>
> On Thu, 24 Dec 2020 00:29:00 +0100 Martin Blumenstingl wrote:
> > Hello,
> >
> > with the help of Jianxin Pan (many thanks!) the meaning of the "new"
> > PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs
> >
On Thu, 24 Dec 2020 00:29:00 +0100 Martin Blumenstingl wrote:
> Hello,
>
> with the help of Jianxin Pan (many thanks!) the meaning of the "new"
> PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs
> are finally known. These SoCs allow fine-tuning the RGMII RX delay in
> 200ps s
Hello,
with the help of Jianxin Pan (many thanks!) the meaning of the "new"
PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs
are finally known. These SoCs allow fine-tuning the RGMII RX delay in
200ps steps (contrary to what I have thought in the past [0] these are
not some "
