On 5 December 2016 at 23:18, Vivien Didelot
wrote:
> Stefan Eichenberger writes:
>
>> Hi Vivien,
>>
>> On Mon, Dec 05, 2016 at 11:27:03AM -0500, Vivien Didelot wrote:
>>> @@ -3266,6 +3220,8 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
>>> .g1_set_cpu_port = mv88e6095_g1_set_cpu_por
Stefan Eichenberger writes:
> Hi Vivien,
>
> On Mon, Dec 05, 2016 at 11:27:03AM -0500, Vivien Didelot wrote:
>> @@ -3266,6 +3220,8 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
>> .g1_set_cpu_port = mv88e6095_g1_set_cpu_port,
>> .g1_set_egress_port = mv88e6095_g1_set_egress_por
Hi Vivien,
On Mon, Dec 05, 2016 at 11:27:03AM -0500, Vivien Didelot wrote:
> @@ -3266,6 +3220,8 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
> .g1_set_cpu_port = mv88e6095_g1_set_cpu_port,
> .g1_set_egress_port = mv88e6095_g1_set_egress_port,
> .mgmt_rsvd2cpu = mv88e609
Some Marvell chips can enable/disable the PPU on demand. This is needed
to access the PHY registers when there is no indirection mechanism.
Add two new ppu_enable and ppu_disable ops to describe this and finally
get rid of the MV88E6XXX_FLAG_PPU* flags.
Signed-off-by: Vivien Didelot
---
drivers
