Re: [PATCH net 2/3] sh_eth: fix TRSCER mask for R7S72100

2021-03-04 Thread Geert Uytterhoeven
On Sun, Feb 28, 2021 at 9:54 PM Sergey Shtylyov wrote: > According to the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware, > Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use > the driver's default TRSCER mask. Add the explicit initializer for > sh_eth_cpu_data::trscer_er

[PATCH net 2/3] sh_eth: fix TRSCER mask for R7S72100

2021-02-28 Thread Sergey Shtylyov
According to the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware, Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use the driver's default TRSCER mask. Add the explicit initializer for sh_eth_cpu_data::trscer_err_mask for R7S72100. Fixes: db893473d313 ("sh_eth: Add support