On Fri, Nov 16, 2018 at 06:48:15AM -0800, Dalon Westergreen wrote:
> For naming, how about intel_fpga_tod ?
Fine by me.
Thanks,
Richard
On Thu, 2018-11-15 at 18:14 -0800, Richard Cochran wrote:
> On Thu, Nov 15, 2018 at 06:55:29AM -0800, Dalon Westergreen wrote:
> > I would prefer to keep altera just to be consistent with the altera_tse
> > stuff,
> > and i intend to reusethis code for a 10GbE driver, so perhaps altera_tod to
> > r
On Thu, 2018-11-15 at 18:14 -0800, Richard Cochran wrote:
> On Thu, Nov 15, 2018 at 06:55:29AM -0800, Dalon Westergreen wrote:
> > Sure, I would like to keep the debugfs entries for disabling freq
> > correction,and
> > reading the current scaled_ppm value. I intend to use these to tune
> > anexte
On Thu, Nov 15, 2018 at 06:55:29AM -0800, Dalon Westergreen wrote:
> Sure, I would like to keep the debugfs entries for disabling freq
> correction,and
> reading the current scaled_ppm value. I intend to use these to tune
> anexternal
> vcxo. If there is a better way to do this, please let me k
On Wed, Nov 14, 2018 at 04:50:45PM -0800, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> Add support for the ptp clock used with the tse, and update
> the driver to support timestamping when enabled. We also
> enable debugfs entries for the ptp clock to allow some user
> control and inte
From: Dalon Westergreen
Add support for the ptp clock used with the tse, and update
the driver to support timestamping when enabled. We also
enable debugfs entries for the ptp clock to allow some user
control and interaction with the ptp clock.
Signed-off-by: Dalon Westergreen
---
drivers/net
