RE: [PATCH net-next 2/5] qed: Fix TM block ILT allocation

2017-04-03 Thread Mintz, Yuval
> > + /* Timers is a special case -> we don't count how many cids require > > S/is/are/. CIDs? What's implicitly meant here is the 'Timer[s] HW block'. I understand it creates an odd looking English sentence, though. Assuming there'll be a V2 for this we'd revise the comment; Otherwise we'

Re: [PATCH net-next 2/5] qed: Fix TM block ILT allocation

2017-04-03 Thread Sergei Shtylyov
On 4/3/2017 12:21 PM, Yuval Mintz wrote: From: Michal Kalderon When configuring the HW timers block we should set the number of CIDs up until the last CID that require timers, instead of only those CIDs whose protocol needs timers support. Today, the protocols that require HW timers' support

[PATCH net-next 2/5] qed: Fix TM block ILT allocation

2017-04-03 Thread Yuval Mintz
From: Michal Kalderon When configuring the HW timers block we should set the number of CIDs up until the last CID that require timers, instead of only those CIDs whose protocol needs timers support. Today, the protocols that require HW timers' support have their CIDs before any other protocol, b