> Any news regarding your test?
No, sorry, I fell ill and don't have that specific hardware at home,
only at work. I will probably test it on thursday or friday.
Marek
On Thursday, March 21, 2019 8:55:55 PM CET Marek Behun wrote:
> Hi,
>
> Oh, I didn't know about Christian's patch.
>
> I shall test on our device tomorrow. If it works, we will use internal
> PHY access.
>
> But I think that qca8k_port_to_phy should be used in the external mode
> as well. On our
On Friday, March 22, 2019 12:01:20 AM CET Marek Behun wrote:
> > Hm, it's not really a "external mode". But let's try one more time.
> > The idea is that if an external mdio-bus (from the SoC) has already
> > registered the PHY 0x0 - 0x4 from the QCA8337, the qca8k should not
> > expose the same PH
> Hm, it's not really a "external mode". But let's try one more time.
> The idea is that if an external mdio-bus (from the SoC) has already
> registered the PHY 0x0 - 0x4 from the QCA8337, the qca8k should not
> expose the same PHYs as it's own mdio-bus because then the PHYs end
> up being register
(Bottom post?)
On Thursday, March 21, 2019 8:55:55 PM CET Marek Behun wrote:
> Hi,
>
> Oh, I didn't know about Christian's patch.
>
> I shall test on our device tomorrow. If it works, we will use internal
> PHY access.
>
> But I think that qca8k_port_to_phy should be used in the external mode
>
On Thursday, March 21, 2019 7:26:08 PM CET Florian Fainelli wrote:
> +Christian,
>
> On 3/21/19 11:23 AM, Marek Behún wrote:
> > The MDIO addresses of the internal PHYs on this switch for ports 1-5
> > have addresses 0-4, not 1-5.
> >
>
> Can you provide a Fixes: tag for this? Your change will c
Hi,
Oh, I didn't know about Christian's patch.
I shall test on our device tomorrow. If it works, we will use internal
PHY access.
But I think that qca8k_port_to_phy should be used in the external mode
as well. On our device the PHYs are mapped on 0-4 on the master bus even
in that mode.
Marek
+Christian,
On 3/21/19 11:23 AM, Marek Behún wrote:
> The MDIO addresses of the internal PHYs on this switch for ports 1-5
> have addresses 0-4, not 1-5.
>
Can you provide a Fixes: tag for this? Your change will conflicts with
Christian's patch series here:
http://patchwork.ozlabs.org/project/n
The MDIO addresses of the internal PHYs on this switch for ports 1-5
have addresses 0-4, not 1-5.
Signed-off-by: Marek Behún
Cc: Andrew Lunn
Cc: Florian Fainelli
Cc: Michal Vokáč
Cc: John Crispin
Cc: Wei Yongjun
---
drivers/net/dsa/qca8k.c | 4 ++--
1 file changed, 2 insertions(+), 2 deleti
