From: Niklas Cassel
Date: Mon, 12 Mar 2018 09:55:42 +0100
> Jose is simply responding to the commit message description of this patch.
>
> You explained that there is an implicit memory barrier between physical memory
> writes and those to MMIO register space, as long as you used writel().
>
>
On Fri, Mar 09, 2018 at 10:15:20AM -0500, David Miller wrote:
> From: Jose Abreu
> Date: Fri, 9 Mar 2018 10:26:11 +
>
> > Sorry but I know at least two architectures which don't do a
> > wmb() upon an writel [1] [2]. This can be critical if if we are
> > accessing the device through some slow
From: Jose Abreu
Date: Fri, 9 Mar 2018 10:26:11 +
> Sorry but I know at least two architectures which don't do a
> wmb() upon an writel [1] [2]. This can be critical if if we are
> accessing the device through some slow or filled bus which will
> delay accesses to the device IO. Notice that w
On Fri 2018-03-09 10:26:11, Jose Abreu wrote:
> Hi Niklas,
>
> On 08-03-2018 10:30, Niklas Cassel wrote:
> > These wmb() memory barriers are performed after the last descriptor write,
> > and they are followed by enable_dma_transmission()/set_tx_tail_ptr(),
> > i.e. a writel() to MMIO register spa
Hi Niklas,
On 08-03-2018 10:30, Niklas Cassel wrote:
> These wmb() memory barriers are performed after the last descriptor write,
> and they are followed by enable_dma_transmission()/set_tx_tail_ptr(),
> i.e. a writel() to MMIO register space.
> Since writel() itself performs the equivalent of a w
From: Niklas Cassel
Date: Thu, 8 Mar 2018 11:30:05 +0100
> These wmb() memory barriers are performed after the last descriptor write,
> and they are followed by enable_dma_transmission()/set_tx_tail_ptr(),
> i.e. a writel() to MMIO register space.
> Since writel() itself performs the equivalent
These wmb() memory barriers are performed after the last descriptor write,
and they are followed by enable_dma_transmission()/set_tx_tail_ptr(),
i.e. a writel() to MMIO register space.
Since writel() itself performs the equivalent of a wmb() before doing the
actual write, these barriers are superfl
