shik
> Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED];
> netdev@vger.kernel.org; [EMAIL PROTECTED];
> [EMAIL PROTECTED]; [EMAIL PROTECTED]
> Subject: RE: [PATCH 2.6.12.1 5/12] S2io: Performance improvements
>
> On Thu, 7 Jul 2005, Raghavendra Koushik wrote:
>
> >
>
8:31 AM
To: Raghavendra Koushik
Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED]; netdev@vger.kernel.org;
[EMAIL PROTECTED]; [EMAIL PROTECTED];
[EMAIL PROTECTED]
Subject: RE: [PATCH 2.6.12.1 5/12] S2io: Performance improvements
On Thu, 7 Jul 2005, Raghavendra Koushik wrote:
>
> On an Altix m
On Thu, 7 Jul 2005, Raghavendra Koushik wrote:
>
> On an Altix machine I believe the readq was necessary to flush
> the PIO writes. How long did you run the tests? I had seen
> in long duration tests that an occasional write
> (TXDL control word and the address) would be missed and the xmit
David S. Miller wrote:
If you need a PIO to complete in a specific order, you
have to read it back. If you need PIO operations to occur
Correct.
A PCI read is the only way to ensure that all the CPU/PCI bridge buffers
are flushed to the device.
Whenever Arjan and I complain about "PCI post
From: "Raghavendra Koushik" <[EMAIL PROTECTED]>
Date: Thu, 7 Jul 2005 18:06:19 -0700
> wmb() is to ensure ordered PIO writes.
wmb() does no such thing. It only has influence on
load and store instructions done by the local processor,
it has no effect on what the PCI bus may do with PIO
writes (i
> To: [EMAIL PROTECTED]
> Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED];
> netdev@vger.kernel.org; [EMAIL PROTECTED];
> [EMAIL PROTECTED]; [EMAIL PROTECTED]
> Subject: Re: [PATCH 2.6.12.1 5/12] S2io: Performance improvements
>
>
> On Thu, 7 Jul 2005 [EMAIL PROTECTE
On Thu, 7 Jul 2005 [EMAIL PROTECTED] wrote:
> ...
> 2. Removed unnecessary PIOs(read/write of tx_traffic_int and
>rx_traffic_int) from interrupt handler and removed read of
>general_int_status register from xmit routine.
> ..
> @@ -2891,6 +2869,8 @@ int s
