Hi Ayaz,
looks good, except:
Ayaz Abdulla wrote:
+
+ NvRegPowerState2 = 0x600,
You access a register at offset 0x600
/* Miscelaneous hardware related defines: */
-#define NV_PCI_REGSZ 0x270
+#define NV_PCI_REGSZ_VER1 0x270
+#define NV_PCI_REGSZ_VER2
Ignore this...the patch number is wrong...I am resending it. Sorry for
the confusion,
Ayaz Abdulla wrote:
This patch fixes the nic initialization. If the nic was in low power
mode, it brings it back to normal power. Also, it utilizes a new
hardware reset during the init.
I am resending based o
This patch fixes the nic initialization. If the nic was in low power
mode, it brings it back to normal power. Also, it utilizes a new
hardware reset during the init.
I am resending based on feedback, I corrected the register size mapping
and delay after posted write.
Signed-Off-By: Ayaz Abdul
