> So would it be possible to add a "quick" bugfix patch (maybe this patch
> or another one removing the clk disable) so this fix can be backported
> to stable? Otherwise our board is only working with another
> "out-of-tree" patch (which I want to avoid)...
Hi Richard
It is a clear regression, so
On 07/07/2017 04:00 PM, Andrew Lunn wrote:
>> Ok. I'm fine with moving the phy-reset-gpios binding into the PHY.
>> But one question still remains: Who should then trigger the "hard
>> reset" of the PHY?
>
> Hi Richard
>
> I think i see a few whys to do this, but first i need to check
> somethin
On Thu, Jul 06, 2017 at 03:05:30PM +0200, Richard Leitner wrote:
> Some PHYs (for example the LAN8710) doesn't allow turning the clocks off
> and on again without reset (according to their datasheet). Exactly this
> behaviour was introduced for power saving reasons by commit e8fcfcd5684a
> ("net: f
> Ok. I'm fine with moving the phy-reset-gpios binding into the PHY.
> But one question still remains: Who should then trigger the "hard
> reset" of the PHY?
Hi Richard
I think i see a few whys to do this, but first i need to check
something. Is the clock which is causing a problem this one:
Hi Andy,
thanks for the clarifications!
On 07/07/2017 01:08 PM, Andy Duan wrote:
3. Who should then trigger the "hard reset" of the PHY? phy_init_hw? The FEC?
The point is that the LAN8710 is currently not always working correctly,
therefore this small change was proposed. Should we really chan
From: Richard Leitner Sent: Friday, July 07, 2017
5:53 PM
>To: Andy Duan ; robh...@kernel.org;
>mark.rutl...@arm.com
>Cc: netdev@vger.kernel.org; devicet...@vger.kernel.org; linux-
>ker...@vger.kernel.org; d...@g0hl1n.net; Andrew Lunn
>Subject: Re: [PATCH 2/2] net: ethernet: fsl
On 07/07/2017 09:03 AM, Andy Duan wrote:
From: Richard Leitner Sent: Friday, July 07, 2017
1:51 PM
Since it is common issue so long as using the PHY, can you move it into smsc
phy driver like in .smsc_phy_reset() function ?
And get the reset pin from phy dts node.
Some more points that co
From: Richard Leitner Sent: Friday, July 07, 2017
1:51 PM
>> Since it is common issue so long as using the PHY, can you move it into smsc
>phy driver like in .smsc_phy_reset() function ?
>> And get the reset pin from phy dts node.
>
>Some more points that come into my mind:
> - The smsc_phy_rese
: [PATCH 2/2] net: ethernet: fsl: add phy reset after clk enable option
Some PHYs (for example the LAN8710) doesn't allow turning the clocks off and
on again without reset (according to their datasheet). Exactly this behaviour
was introduced for power saving reasons by commit e8fcfcd5684a
(&quo
From: Richard Leitner Sent: Thursday, July 06,
2017 9:06 PM
>To: Andy Duan ; robh...@kernel.org;
>mark.rutl...@arm.com
>Cc: netdev@vger.kernel.org; devicet...@vger.kernel.org; linux-
>ker...@vger.kernel.org; d...@g0hl1n.net; Richard Leitner
>
>Subject: [PATCH 2/2] net: ethe
On 07/06/2017 03:55 PM, Andrew Lunn wrote:
>> diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt
>> b/Documentation/devicetree/bindings/net/fsl-fec.txt
>> index 6f55bdd..1766579 100644
>> --- a/Documentation/devicetree/bindings/net/fsl-fec.txt
>> +++ b/Documentation/devicetree/binding
Hi Richard
> diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt
> b/Documentation/devicetree/bindings/net/fsl-fec.txt
> index 6f55bdd..1766579 100644
> --- a/Documentation/devicetree/bindings/net/fsl-fec.txt
> +++ b/Documentation/devicetree/bindings/net/fsl-fec.txt
> @@ -23,6 +23,9 @@
Some PHYs (for example the LAN8710) doesn't allow turning the clocks off
and on again without reset (according to their datasheet). Exactly this
behaviour was introduced for power saving reasons by commit e8fcfcd5684a
("net: fec: optimize the clock management to save power")
Therefore add a devictr
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