On Thu, 2007-11-15 at 16:32 -0800, Rick Jones wrote:
> I'm going to get very rapidly out of my PCI depth, but on one or the
> other (e vs X) isn't is possible from the standpoint of PCI for a device
> to have multiple transactions outstanding at a time?
Yes, see my other response. Multiple out
I sense that the PCI spec wants devices to use an MRRS value of 512 in
order to get better fairness on a PCI-E segment amongst multiple
devices.
Unless there are PCIe switches, there is only ever one device on the
PCIe segment yes? Even on the biggest PCI-X or PCIe systems with which
I am fam
On Mon, 2007-11-12 at 21:21 -0800, David Miller wrote:
> From: "Matt Carlson" <[EMAIL PROTECTED]>
> Date: Fri, 09 Nov 2007 16:39:01 -0800
>
> > Previous devices hardcoded the PCI Maximum Read Request Size to 4K. To
> > better comply with the PCI spec, the hardware now defaults the MRRS to
> > 512
From: "Michael Chan" <[EMAIL PROTECTED]>
Date: Thu, 15 Nov 2007 15:51:31 -0800
> I don't know what's the exact rationale for defaulting to 512, but I
> will try to find out.
Thank you.
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On Thu, 2007-11-15 at 14:41 -0800, David Miller wrote:
> From: "Matt Carlson" <[EMAIL PROTECTED]>
> Date: Thu, 15 Nov 2007 14:20:10 -0800
> >
> > Keeping the MRRS at 512 introduces DMA latencies that effectively
> > prevent us from achieving linerate. With a packet size of ~1.5K and the
> > MRRS a
From: "Matt Carlson" <[EMAIL PROTECTED]>
Date: Thu, 15 Nov 2007 14:20:10 -0800
> On Mon, 2007-11-12 at 21:21 -0800, David Miller wrote:
> > From: "Matt Carlson" <[EMAIL PROTECTED]>
> > Date: Fri, 09 Nov 2007 16:39:01 -0800
> >
> > > Previous devices hardcoded the PCI Maximum Read Request Size to
From: "Matt Carlson" <[EMAIL PROTECTED]>
Date: Fri, 09 Nov 2007 16:39:01 -0800
> Previous devices hardcoded the PCI Maximum Read Request Size to 4K. To
> better comply with the PCI spec, the hardware now defaults the MRRS to
> 512 bytes. This will yield poor driver performance if left untouched.
Previous devices hardcoded the PCI Maximum Read Request Size to 4K. To
better comply with the PCI spec, the hardware now defaults the MRRS to
512 bytes. This will yield poor driver performance if left untouched.
This patch increases the MRRS to 4K on driver initialization.
Signed-off-by: Matt Ca
