Hi Nicolas,
On Fri, Jan 25, 2019 at 3:58 PM wrote:
>
> On 24/01/2019 at 14:38, Harini Katakam wrote:
> > The interrupt handler contains a workaround for RX hang applicable
> > to Zynq and AT91 only. Subsequent versions do not need this
>
> AT91RM9200 only. It's not the case for other AT91 SoCs (r
On 24/01/2019 at 14:38, Harini Katakam wrote:
> The interrupt handler contains a workaround for RX hang applicable
> to Zynq and AT91 only. Subsequent versions do not need this
AT91RM9200 only. It's not the case for other AT91 SoCs (reading errata
list for them).
That being said I have to add a
The interrupt handler contains a workaround for RX hang applicable
to Zynq and AT91 only. Subsequent versions do not need this
workaround. This workaround unecessarily resets RX whenever RX used
bit read is observed, which can be often under heavy traffic. Hence
introduce an CAPS mask and a check t
On 29.11.2018 12:38, Harini Katakam wrote:
> Hi Claudiu,
> On Thu, Nov 29, 2018 at 3:51 PM wrote:
>>
>>
>>
>> On 23.11.2018 11:59, Harini Katakam wrote:
>
>>> - if (status & MACB_BIT(RXUBR)) {
>>> + if ((bp->errata & MACB_ERRATA_RXLOCKUP) &&
>>> + (status
Hi Claudiu,
On Thu, Nov 29, 2018 at 3:51 PM wrote:
>
>
>
> On 23.11.2018 11:59, Harini Katakam wrote:
> > - if (status & MACB_BIT(RXUBR)) {
> > + if ((bp->errata & MACB_ERRATA_RXLOCKUP) &&
> > + (status & MACB_BIT(RXUBR))) {
>
> Just asking, did you manage
On 23.11.2018 11:59, Harini Katakam wrote:
> The interrupt handler contains a workaround for RX hang applicable
> to Zynq and AT91 only. Subsequent versions do not need this
> workaround. This workaround unecessarily reset RX whenever RX used
> bit read is observed, which can be often under heavy
On 28.11.2018 23:09, Brandon Streiff wrote:
> On 11/23/2018 3:59 AM, Harini Katakam wrote:
>> +/* Errata mask bits */
>> +#define MACB_ERRATA_RXLOCKUP0x0001
>> +
>> /* LSO settings */
>> #define MACB_LSO_UFO_ENABLE 0x01
>> #define MACB_LSO_TSO_ENABLE
Hi Brandon,
On Thu, Nov 29, 2018 at 2:39 AM Brandon Streiff wrote:
>
> On 11/23/2018 3:59 AM, Harini Katakam wrote:
> > +/* Errata mask bits */
> > +#define MACB_ERRATA_RXLOCKUP 0x0001
> > +
> > /* LSO settings */
> > #define MACB_LSO_UFO_ENABLE 0x01
> > #d
On 11/23/2018 3:59 AM, Harini Katakam wrote:
> +/* Errata mask bits */
> +#define MACB_ERRATA_RXLOCKUP 0x0001
> +
> /* LSO settings */
> #define MACB_LSO_UFO_ENABLE 0x01
> #define MACB_LSO_TSO_ENABLE 0x02
> @@ -1085,6 +1088,7 @@ struct macb_c
The interrupt handler contains a workaround for RX hang applicable
to Zynq and AT91 only. Subsequent versions do not need this
workaround. This workaround unecessarily reset RX whenever RX used
bit read is observed, which can be often under heavy traffic.Hence
introduce an errata field and a check
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