Re: [PATCH] net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode

2020-10-19 Thread Andrew Lunn
> > Hi Robert > > > > That looks like a layering violation. Maybe move this into > > phylink_mii_c22_pcs_config(), it is accessing MII_BMCR anyway. > > Could do - do we think there's any harm in just disabling BMCR_ISOLATE > in all cases in that function? We have something similar in phylib: /*

Re: [PATCH] net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode

2020-10-19 Thread Robert Hancock
On Mon, 2020-10-19 at 23:36 +0200, Andrew Lunn wrote: > > static void axienet_mac_config(struct phylink_config *config, > > unsigned int mode, > >const struct phylink_link_state *state) > > { > > - /* nothing meaningful to do */ > > + struct net_device *ndev = to_n

Re: [PATCH] net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode

2020-10-19 Thread Andrew Lunn
> static void axienet_mac_config(struct phylink_config *config, unsigned int > mode, > const struct phylink_link_state *state) > { > - /* nothing meaningful to do */ > + struct net_device *ndev = to_net_dev(config->dev); > + struct axienet_local *lp = net

[PATCH] net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode

2020-10-19 Thread Robert Hancock
Update the axienet driver to properly support the Xilinx PCS/PMA PHY component which is used for 1000BaseX and SGMII modes, including properly configuring the auto-negotiation mode of the PHY and reading the negotiated state from the PHY. Signed-off-by: Robert Hancock --- drivers/net/ethernet/xi