On Thu, Oct 25, 2007 at 05:12:04AM -0400, Jeff Garzik wrote:
> >+struct rx_desc {
> >+u32 cmd_sts;
> >+u16 size;
> >+u16 count;
> >+u32 buf;
> >+u32 next;
> >+};
> >+
> >+struct tx_desc {
> >+u32 cmd_sts;
> >+u16 l4i_chk;
> >+u16 count;
> >+u32 buf;
> >+u32
Lennert Buytenhek wrote:
+struct rx_desc {
+ u32 cmd_sts;
+ u16 size;
+ u16 count;
+ u32 buf;
+ u32 next;
+};
+
+struct tx_desc {
+ u32 cmd_sts;
+ u16 l4i_chk;
+ u16 count;
+ u32 buf;
+ u32 next;
+};
should use sparse type (__le32, etc
On Thu, Oct 18, 2007 at 03:15:36AM +0200, Lennert Buytenhek wrote:
> > > +#define PORT_CONF0x400
> > > +#define PORT_CONF_EXT0x404
> > > +#define PORT_MAC_LO 0x414
> > > +#define PORT_MAC_HI 0x418
> > > +#define PORT_SDMA0x41c
>
In article <[EMAIL PROTECTED]> you write:
> Interesting. After some asking around, it appears that the mv643xx
> ethernet silicon block is indeed very similar to the ethernet silicon
> block found the in Orion ARM SoCs.
>
> We'll work on getting Orion to use mv643xx_eth. Thanks for pointing
> th
On Tue, Oct 16, 2007 at 11:31:15PM +0200, Maxime Bizon wrote:
> Hello,
Hi,
> > +#define PORT_CONF 0x400
> > +#define PORT_CONF_EXT 0x404
> > +#define PORT_MAC_LO0x414
> > +#define PORT_MAC_HI0x418
> > +#define PORT_SDMA 0x41c
> > +#
On Tue, 2007-10-16 at 21:28 +0200, Lennert Buytenhek wrote:
Hello,
> +#define PORT_CONF0x400
> +#define PORT_CONF_EXT0x404
> +#define PORT_MAC_LO 0x414
> +#define PORT_MAC_HI 0x418
> +#define PORT_SDMA0x41c
> +#define PORT_SERIAL
On Tue, 16 Oct 2007 21:28:06 +0200
Lennert Buytenhek <[EMAIL PROTECTED]> wrote:
> Attached is a driver for the built-in 10/100/1000 ethernet MAC in
> the Marvell Orion series of ARM SoCs.
>
> This ethernet MAC supports the MII/GMII/RGMII PCS interface types,
> and offers a pretty standard set of
Attached is a driver for the built-in 10/100/1000 ethernet MAC in
the Marvell Orion series of ARM SoCs.
This ethernet MAC supports the MII/GMII/RGMII PCS interface types,
and offers a pretty standard set of MAC features, such as RX/TX
checksum offload, scatter-gather, interrupt coalescing, PAUSE,