dev_err(&pdev->dev,
> "could not map DMA registers\n");
> - return -ENOMEM;
> + return PTR_ERR(lp->sdma_regs);
> }
> if (pdata->dma_little_endian) {
> lp->dma_in = temac_dma_in32_le;
Acked-by: Esben Haabendal
On Tue, 09 Apr 2019, Thomas Bogendoerfer wrote:
>
> diff --git a/drivers/net/ethernet/sgi/ioc3-eth.c
> b/drivers/net/ethernet/sgi/ioc3-eth.c
> index 358e66b81926..21fe722ebcd8 100644
> --- a/drivers/net/ethernet/sgi/ioc3-eth.c
> +++ b/drivers/net/ethernet/sgi/ioc3-eth.c
>
> [ ... ]
>
> -
Fixes: d84aec42151b ("net: ll_temac: Fix support for 64-bit platforms")
Signed-off-by: Esben Haabendal
---
drivers/net/ethernet/xilinx/ll_temac_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/xilinx/ll_temac_main.c
b/drivers/net/ether
Unmap the actual buffer length, not the amount of data received, avoiding
resource exhaustion of swiotlb (seen on x86_64 platform).
Signed-off-by: Esben Haabendal
---
drivers/net/ethernet/xilinx/ll_temac_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net
and app4 for piggybacking skb pointers there is no
need to care about endianness, as neither TEMAC nor SDMA access app3 and
app4 in TX buffer descriptors.
Signed-off-by: Esben Haabendal
---
drivers/net/ethernet/xilinx/ll_temac_main.c | 90 -
1 file changed, 51
As soon as TAILDESCR_PTR is written, DMA transfers might start.
Let's ensure we are ready to receive DMA IRQ's before doing that.
Signed-off-by: Esben Haabendal
---
drivers/net/ethernet/xilinx/ll_temac_main.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
di
With little-endian and 64-bit support in place, the ll_temac driver can
now be used on x86 and x86_64 platforms.
And while at it, enable COMPILE_TEST also.
Signed-off-by: Esben Haabendal
---
drivers/net/ethernet/xilinx/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
not make any
difference in the hardware I have available, so it is left in to not risk
breaking other platforms where it might be used.
Signed-off-by: Esben Haabendal
---
drivers/net/ethernet/xilinx/ll_temac.h| 4 +++
drivers/net/ethernet/xilinx/ll_temac_main.c | 40
From: Esben Haabendal
The datasheet specifies a 3uS pause after performing a software
reset. The default implementation of genphy_soft_reset() does not
provide this, so implement soft_reset with the needed pause.
Signed-off-by: Esben Haabendal
Reviewed-by: Andrew Lunn
---
drivers/net/phy
Andrew Lunn writes:
>> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index
>> 0e0978d8a0eb..f03a510f1247 100644
>> --- a/drivers/net/phy/marvell.c
>> +++ b/drivers/net/phy/marvell.c
>> @@ -457,6 +457,21 @@ static int marvell_of_reg_init(struct phy_device
>> *phydev) } #endif
From: Esben Haabendal
Signed-off-by: Esben Haabendal
---
drivers/net/phy/dp83640.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index 654f42d00092..a6c87793d899 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers
David Miller writes:
> From: Andrew Lunn
> Date: Fri, 6 Apr 2018 16:14:10 +0200
>
>> On Fri, Apr 06, 2018 at 04:05:40PM +0200, Esben Haabendal wrote:
>>> From: Esben Haabendal
>>>
>>> Signed-off-by: Esben Haabendal
>>> ---
>>>
From: Esben Haabendal
Signed-off-by: Esben Haabendal
---
drivers/net/phy/dp83640.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index 654f42d00092..48403170096a 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers
From: Esben Haabendal
The current (mildly evil) fsl_pq_mdio code uses an undocumented shadow of
the TBIPA register on LS1021A, which happens to be read-only.
Changing TBI PHY address therefore does not work on LS1021A.
The real (and documented) address of the TBIPA registere lies in the eTSEC
From: Esben Haabendal
This introduces a simpler and generic method for for finding (and mapping)
the TBIPA register.
Instead of relying of complicated logic for finding the TBIPA register
address based on the MDIO or MII register block base
address, which even in some cases relies on
David Miller writes:
> From: Andrew Lunn
> Date: Thu, 5 Apr 2018 22:40:49 +0200
>
>> Or could it still contain whatever state the last boot of Linux, or
>> maybe the bootloader, left the PHY in?
>
> Right, this is my concern as well.
I don't think that should happen.
With config_init() being ca
From: Esben Haabendal
The LED2[2]/INTn pin on Marvell 88E1318S as well as 88E1510/12/14/18 needs
to be configured to be usable as interrupt not only when WOL is enabled,
but whenever we rely on interrupts from the PHY.
Signed-off-by: Esben Haabendal
Cc: Rasmus Villemoes
---
drivers/net/phy
Florian Fainelli writes:
> On 04/05/2018 04:44 AM, esben.haaben...@gmail.com wrote:
>> From: Esben Haabendal
>>
>> Add a function for use in PHY driver probe functions, reading current
>> autoneg, speed and duplex configuration from BMCR register.
>>
>>
Florian Fainelli writes:
> On 04/05/2018 04:44 AM, esben.haaben...@gmail.com wrote:
>> From: Esben Haabendal
>>
>> Read configration settings, to allow automatic forced speed/duplex setup
>> by hardware strapping.
>
> OK but why? What problem is this solving
Florian Fainelli writes:
> On 04/05/2018 04:44 AM, esben.haaben...@gmail.com wrote:
>> From: Esben Haabendal
>>
>> Read configration settings, to allow automatic forced speed/duplex setup
>> by hardware strapping.
>
> OK but why? What problem is this solving
Florian Fainelli writes:
> On 04/05/2018 04:44 AM, esben.haaben...@gmail.com wrote:
>> From: Esben Haabendal
>>
>> Add a function for use in PHY driver probe functions, reading current
>> autoneg, speed and duplex configuration from BMCR register.
>>
>>
From: Esben Haabendal
The LED2[2]/INTn pin on Marvell 88E1318S as well as 88E1510/12/14/18 needs
to be configured to be usable as interrupt not only when WOL is enabled,
but whenever we rely on interrupts from the PHY.
Signed-off-by: Esben Haabendal
Cc: Rasmus Villemoes
---
drivers/net/phy
From: Esben Haabendal
Add a function for use in PHY driver probe functions, reading current
autoneg, speed and duplex configuration from BMCR register.
Useful for PHY that supports hardware strapped configuration, enabling
Linux to respect that configuration (i.e. strapped non-autoneg
From: Esben Haabendal
Read configration settings, to allow automatic forced speed/duplex setup
by hardware strapping.
Signed-off-by: Esben Haabendal
Cc: Rasmus Villemoes
---
drivers/net/phy/dp83640.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/net/phy/dp83640.c b/drivers
Hi Scott,
A minor error handling bug
> + const u32 *data = of_get_property(np, "phy-handle", &len);
> + if (!data || len != 4)
> + return -EINVAL;
> +
> + phynode = of_find_node_by_phandle(*data);
> + if (!phynode)
> + return -EINVAL;
> +
> + mdionode =
25 matches
Mail list logo