Hi Vladimir,
On Tue, Apr 20, 2021 at 16:27:10AM +0800, Vladimir Oltean wrote:
>
> On Tue, Apr 20, 2021 at 03:06:40AM +, Xiaoliang Yang wrote:
>> Hi Vladimir.
>>
>> On Mon, Apr 19, 2021 at 20:38PM +0800, Vladimir Oltean wrote:
>> >
>> >What is a sche
queue is scheduled. Only the set queues serves schedule traffic. In this driver
we set all 8 queues to be scheduled in default, so all the traffic are schedule
queues to
schedule queue.
Thanks,
Xiaoliang Yang
.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c
b/drivers/net/dsa/ocelot/felix_vsc9959.c
index 789fe08cae50..2473bebe48e6 100644
--- a/drivers/net/dsa/ocelot
On 2020-11-18 3:01 Joergen Andreasen wrote:
>
> Hi Xiaoliang,
>
> I like your idea about using filter actions for FRER configuration.
>
> I think this is a good starting point but I think that this approach will
> only allow us to configure end systems and not relay systems in
> bridges/switches
Hi Jamal,
On 2020-11-19 0:11, Jamal Hadi Salim wrote:
> The 11/17/2020 14:30, Xiaoliang Yang wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you
>> know the content is safe
>>
>> This patch introduce a redundancy flow action to implemen
n_id 1 \
action redundancy generator split dev swp1 dev swp2
> tc filter add dev swp0 ingress protocol 802.1Q flower
skip_hw dst_mac 00:01:02:03:04:06 vlan_id 1 \
action redundancy recover
Signed-off-by: Xiaoliang Yang
---
include/net/flow_
c CA:9C:00:BC:6D:68 vlan_id 1 \
action gate index 1 base-time 0 \
sched-entry CLOSE 6000 3 -1
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/Makefile| 3 +-
drivers/net/dsa/ocelot/felix.c | 23 +
drivers/net/dsa/oce
shared with PSFP set.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix.c| 2 +
drivers/net/dsa/ocelot/felix.h| 2 +
drivers/net/dsa/ocelot/felix_vsc9959.c| 4 +
drivers/net/ethernet/mscc/ocelot_flower.c | 5 +
drivers/net/ethernet/mscc
_sw action goto chain 3
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc/ocelot_flower.c | 14 +-
include/soc/mscc/ocelot.h | 10 ++
2 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mscc/ocelot_flower.c
b/driv
flower skip_sw dst_mac 42:01:3E:72:2F:6B vlan_id 1 \
action gate index 1 base-time 0 \
sched-entry OPEN 6000 3 -1 \
action police index 1 rate 10Mbit burst 1
Xiaoliang Yang (5):
net: mscc: ocelot: add and export MAC table lookup operati
ocelot_vcap_policer_add() and ocelot_vcap_policer_del() to set flow
meter table.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_flower.c | 32 +++
1 file changed, 32 insertions(+)
diff --git a/drivers/net/dsa/ocelot/felix_flower.c
b/drivers/net/dsa/ocelot
Add ocelot_mact_lookup() function to retrieve the row and column at
which an FDB entry with the given {DMAC, VID} key is found.
This function is needed in felix DSA driver, so export it.
Signed-off-by: Vladimir Oltean
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc/ocelot.c | 33
Preempt_set and preempt_get are new functions of ethtool ops, which
is to configure frame preemption according to 802.1qbu and 802.3br.
Add them on slave ports of DSA framework, so that DSA devices can
support to configure frame preemption by using ethtool.
Signed-off-by: Xiaoliang Yang
VSC9959 support preempt queues according to 802.1qbu and 802.3br. This
patch add ethtool preempt set to configure preemption.
In user space, it can be set like this:
ethtool --set-frame-preemption swp0 enable min-frag-size 0
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot
ption"
link:
http://patchwork.ozlabs.org/project/netdev/patch/20201012235642.1384318-2-vinicius.go...@intel.com/
Xiaoliang Yang (3):
net: dsa: ethtool preempt ops support on slave ports
net: dsa: felix: add preempt queues set support for vsc9959
net: dsa: felix: tc-taprio preempt s
After using ethtool to enable and configure frame preemption on
vsc9959, use tc-taprio preempt set to mark the preempt queues and
express queueus.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 16
1 file changed, 16 insertions(+)
diff --git a
INIT_IPS and GATE_STATE fields have a wrong offset in SG_CONFIG_REG_3.
This register is used by stream gate control of PSFP, and it has not
been used before, because PSFP is not implemented in ocelot driver.
Signed-off-by: Xiaoliang Yang
---
include/soc/mscc/ocelot_ana.h | 8
1 file
Hi Alexandre,
On 24/09/2020 15:08:21+0800, Alexandre Belloni wrote:
>
> Hi,
>
> On 24/09/2020 10:11:13+0800, Xiaoliang Yang wrote:
> > INIT_IPS and GATE_ENABLE fields have a wrong offset in SG_CONFIG_REG_3.
>
> You are changing GATE_STATE, not GATE_ENABLE
Oh, sorry,
INIT_IPS and GATE_ENABLE fields have a wrong offset in SG_CONFIG_REG_3.
This register is used by stream gate control of PSFP, and it has not
been used before, because PSFP is not implemented in ocelot driver.
Signed-off-by: Xiaoliang Yang
---
include/soc/mscc/ocelot_ana.h | 8
1 file
On Tue, Sep 22, 2020 at 19:37, Vladimir Oltean wrote:
>
> Hi Xiaoliang,
>
> On Tue, Sep 22, 2020 at 06:43:02PM +0800, Xiaoliang Yang wrote:
> > state->speed holds a value of 10, 100, 1000 or 2500, but
> > QSYS_TAG_CONFIG_LINK_SPEED expects a value of 0, 1, 2, 3. So
state->speed holds a value of 10, 100, 1000 or 2500, but
QSYS_TAG_CONFIG_LINK_SPEED expects a value of 0, 1, 2, 3. So convert the
speed to a proper value.
Fixes: de143c0e274b ("net: dsa: felix: Configure Time-Aware Scheduler via
taprio offload")
Signed-off-by: Xiaoliang Yang
state->speed holds a value of 10, 100, 1000 or 2500, but
QSYS_TAG_CONFIG_LINK_SPEED expects a value of 0, 1, 2, 3. So convert the
speed to a proper value.
Fixes: de143c0e274b ("net: dsa: felix: Configure Time-Aware Scheduler via
taprio offload")
Signed-off-by: Xiaoliang Yang
---
18.07.2020 3:10, Allan wrote:
>
> Okay - I will need to look deeper into to this to really understand the
> consequences of mixing different types of filters. As far as Joergens example
> goes, "matchall" is really the same as a flower without any matches.
>
> Long story short, to me the most im
ev swp0 chain 21000 protocol 802.1Q
>> parent : flower skip_sw vlan_id 1 vlan_prio 1 action drop
>>
>> In driver, we check if the chain ID has been registered, and goto chain is
>> the same as first matchall rule, if is not, then return error. Each rule
>> need has goto actio
ction goto chain 21000
# tc filter add dev swp0 chain 21000 protocol 802.1Q parent : flower
skip_sw vlan_id 1 vlan_prio 1 action drop
In driver, we check if the chain ID has been registered, and goto chain is the
same as first matchall rule, if is not, then return error. Each rule need has
goto action except last chain.
I also have check about chain template, it can not set an action template for
each chain, so I think it's no use for our case. If this way to set rules is
OK, I will update the patch to do as this.
Thanks,
Xiaoliang Yang
chip has PSFP and "Sequence Generation recovery" modules
are running after IS2, the flow order like this: IS1->IS2->PSFP-> "Sequence
Generation recovery" ->ES0, we can also add chains like this to express these
two modules in future.
BTW, where should I sent patches to due to net-next closed?
Thanks,
Xiaoliang Yang
When calculating vcap data offset, the function only supports half key
entry. This patch modify vcap_data_offset_get function to calculate a
correct data offset when setting VCAP Type-Group to VCAP_TG_FULL or
VCAP_TG_QUARTER.
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc
hen
available
Xiaoliang Yang (7):
net: mscc: ocelot: allocated rules to different hardware VCAP TCAMs by
chain index
net: mscc: ocelot: change vcap to be compatible with full and quad
entry
net: mscc: ocelot: VCAP IS1 support
net: mscc: ocelot: VCAP ES0 support
net: mscc: oce
From: Vladimir Oltean
When the Extraction Frame Header contains a valid classified VLAN, use
that instead of the VLAN header present in the packet.
Signed-off-by: Vladimir Oltean
---
net/dsa/tag_ocelot.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/net/dsa
Some of IS2 IP4_TCP_UDP keys are not correct, like L4_DPORT, L4_SPORT
and other L4 keys. It causes the issue that VCAP IS2 could not filter
a right dst/src port for TCP/UDP packages.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 16
1 file changed
Return error if rule is not found in rule list to avoid Kernel panic.
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc/ocelot_ace.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mscc/ocelot_ace.c
b/drivers/net/ethernet/mscc
n
0 is offloaded to ES0.
Using action goto chain to express flow order as follows:
tc filter add dev swp0 chain 0 parent : flower skip_sw \
action goto chain 1
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc/ocelot_ace.c| 51 +++
drive
instantiation-specific
data to struct vcap_props, and pass that as an argument to each function
that does the key and action packing. Only the high-level functions need
to have access to ocelot->vcap[VCAP_IS2].
Signed-off-by: Vladimir Oltean
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/feli
dev swp0 ingress
tc filter add dev swp0 protocol 802.1Q parent : flower \
skip_sw vlan_id 1 vlan_prio 1 action vlan modify id 2 priority 2
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c| 102 +++
drivers/net/ethernet/mscc/ocelot.c
VCAP ES0 is an egress VCAP working on all outgoing frames.
This patch added ES0 driver to support vlan push action of tc filter.
Usage:
tc filter add dev swp1 egress protocol 802.1Q flower skip_sw
vlan_id 1 vlan_prio 1 action vlan push id 2 priority 2
Signed-off-by: Xiaoliang Yang
Support multiple actions for each flower rule, multiple actions can only
set on the same VCAP, and all actions can mix with action goto chain.
Action drop, trap, and police on VCAP IS2 could not be mixed.
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc/ocelot_ace.c| 15
From: Vladimir Oltean
There are some targets (register blocks) in the Ocelot switch that are
instantiated more than once. For example, the VCAP IS1, IS2 and ES0
blocks all share the same register layout for interacting with the cache
for the TCAM and the action RAM.
For the VCAPs, the procedure
Set the default QoS Classification based on PCP and DEI of vlan tag,
after that, frames can be Classified to different Qos based on PCP tag.
If there is no vlan tag or vlan ignored, use port default Qos.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix.c | 26
_tc of felix.info.
- fix code style for cbs_set, rename variables.
Xiaoliang Yang (3):
net: dsa: felix: qos classified based on pcp
net: dsa: felix: Configure Time-Aware Scheduler via taprio offload
net: dsa: felix: add support Credit Based Shaper(CBS) for hardware
offload
drivers/net/
VSC9959 hardware support the Credit Based Shaper(CBS) which part
of the IEEE-802.1Qav. This patch support sch_cbs set for VSC9959.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff
TAS set function on felix
driver.
Signed-off-by: Xiaoliang Yang
Reviewed-by: Vladimir Oltean
---
drivers/net/dsa/ocelot/felix.c | 19
drivers/net/dsa/ocelot/felix.h | 5 +
drivers/net/dsa/ocelot/felix_vsc9959.c | 140 +
3 files changed, 164
Hi Vinicius,
On Tue, 12 May 2020 9:42:23 Vinicius Costa Gomes wrote:
> > +
> > + /* Rate unit is 100 kbps */
> > + cir = DIV_ROUND_UP(cbs_qopt->idleslope, 100);
> > + cir = (cir ? cir : 1);
> > + cir = min_t(u32, GENMASK(14, 0), cir);
>
> Please rename 'cir' to "rate" or "idleslop
Hi Jakub,
On Mon, 11 May 2020 22:34:32 Jakub Kicinski wrote:
> > +int vsc9959_qos_port_cbs_set(struct dsa_switch *ds, int port,
> > + struct tc_cbs_qopt_offload *cbs_qopt)
>
> static
I will update this in v2, thanks.
Regards,
Xiaoliang Yang
EI_MAP_DP_PCP_DEI_VAL is 1 bit. Are you sure this should be % i
> and not % 2?
Because in QOS_PCP_DEI_MAP_CFG register, BIT(3) is DP value, BIT(2, 0) is QOS
value. QoS class=QOS_PCP_DEI_MAP_CFG[i].QOS_PC
P_DEI_VAL, i=8*DEI + PCP, so DP value need to be set BIT(3)&i.
Regards,
Xiaoliang Yang
VSC9959 hardware support the Credit Based Shaper(CBS) which part
of the IEEE-802.1Qav. This patch support sch_cbs set for VSC9959.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 52 +-
1 file changed, 51 insertions(+), 1 deletion(-)
diff
This patch series support tc taprio and CBS hardware offload according
to IEEE 802.1Qbv and IEEE-802.1Qav on VSC9959.
Xiaoliang Yang (3):
net: dsa: felix: qos classified based on pcp
net: dsa: felix: Configure Time-Aware Scheduler via taprio offload
net: dsa: felix: add support Credit Based
TAS set function on felix
driver.
Signed-off-by: Xiaoliang Yang
Reviewed-by: Vladimir Oltean
---
drivers/net/dsa/ocelot/felix.c | 10 +-
drivers/net/dsa/ocelot/felix.h | 5 +
drivers/net/dsa/ocelot/felix_vsc9959.c | 140 +
3 files changed, 154 insertions
Set the default QoS Classification based on PCP and DEI of vlan tag,
after that, frames can be Classified to different Qos based on PCP tag.
If there is no vlan tag or vlan ignored, use port default Qos.
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix.c | 6
Hi Allan,
> Hi Vladimir,
>
> On 06.05.2020 13:53, Vladimir Oltean wrote:
[snip]
> >At the moment, the driver does not support more than 1 action. We might
> >need to change that, but we can still install more filters with the
> >same key and still be fine (see more below). When there is more t
VCAP ES0 is an egress VCAP working on all outgoing frames.
This patch added ES0 driver to support vlan push action of tc filter.
Usage:
tc filter add dev swp1 egress protocol 802.1Q flower skip_sw
vlan_id 1 vlan_prio 1 action vlan push id 2 priority 2
Signed-off-by: Xiaoliang Yang
add dev swp0 protocol 802.1Q parent : flower \
skip_sw vlan_id 1 vlan_prio 1 action vlan modify id 2 priority 2
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/felix_vsc9959.c| 102 +++
drivers/net/ethernet/mscc/ocelot.c| 7 +
drivers/net/ethernet/mscc
From: Vladimir Oltean
When the Extraction Frame Header contains a valid classified VLAN, use
that instead of the VLAN header present in the packet.
Signed-off-by: Vladimir Oltean
---
net/dsa/tag_ocelot.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/net/dsa
instantiation-specific
data to struct vcap_props, and pass that as an argument to each function
that does the key and action packing. Only the high-level functions need
to have access to ocelot->vcap[VCAP_IS2].
Signed-off-by: Vladimir Oltean
Signed-off-by: Xiaoliang Yang
---
drivers/net/dsa/ocelot/feli
From: Vladimir Oltean
There are some targets (register blocks) in the Ocelot switch that are
instantiated more than once. For example, the VCAP IS1, IS2 and ES0
blocks all share the same register layout for interacting with the cache
for the TCAM and the action RAM.
For the VCAPs, the procedure
When calculating vcap data offset, the function only supports half key
entry. This patch modify vcap_data_offset_get function to calculate a
correct data offset when setting VCAP Type-Group to VCAP_TG_FULL or
VCAP_TG_QUARTER.
Signed-off-by: Xiaoliang Yang
---
drivers/net/ethernet/mscc
.
Vladimir Oltean (3):
net: mscc: ocelot: introduce a new ocelot_target_{read,write} API
net: mscc: ocelot: generalize existing code for VCAP IS2
net: dsa: tag_ocelot: use VLAN information from tagging header when
available
Xiaoliang Yang (3):
net: mscc: ocelot: change vcap to be
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