Re: [PATCH v2 net-next 1/3] ptp: ptp_clockmatrix: Add wait_for_sys_apll_dpll_lock.

2021-02-16 Thread Vincent Cheng
On Mon, Feb 15, 2021 at 02:48:22PM EST, Jakub Kicinski wrote: >On Sat, 13 Feb 2021 00:06:04 -0500 vincent.cheng...@renesas.com wrote: >> +static int read_sys_apll_status(struct idtcm *idtcm, u8 *status) >> +{ >> +int err; >> + >> +err = idtcm_read(idtcm, STATUS, DPLL_SYS_APLL_STATUS, statu

Re: [PATCH net-next 1/2] ptp: ptp_clockmatrix: Add wait_for_sys_apll_dpll_lock.

2021-02-12 Thread Vincent Cheng
On Fri, Feb 12, 2021 at 10:31:40AM EST, Richard Cochran wrote: >On Thu, Feb 11, 2021 at 11:38:44PM -0500, vincent.cheng...@renesas.com wrote: > >> +static int wait_for_sys_apll_dpll_lock(struct idtcm *idtcm) >> +{ >> +char *fmt = "%d ms SYS lock timeout: APLL Loss Lock %d DPLL state %d"; > >P

Re: [PATCH net-next V2] Let the ADJ_OFFSET interface respect the ADJ_NANO flag for PHC devices.

2020-05-24 Thread Vincent Cheng
err = ops->adjphase(ops, offset); >+ } > } else if (tx->modes == 0) { > tx->freq = ptp->dialed_frequency; > err = 0; >-- Hi Richard, Oops. Thank-you for the fix. Thanks, Vincent Reviewed-by: Vincent Cheng

Re: [PATCH net-next 3/3] ptp: ptp_clockmatrix: Add adjphase() to support PHC write phase mode.

2020-05-01 Thread Vincent Cheng
On Thu, Apr 30, 2020 at 11:56:01PM EDT, Richard Cochran wrote: >On Wed, Apr 29, 2020 at 08:28:25PM -0400, vincent.cheng...@renesas.com wrote: >> @@ -871,6 +880,69 @@ static int idtcm_set_pll_mode(struct idtcm_channel >> *channel, >> >> +int err; >> +u8 i; >> +u8 buf[4] = {0}; >> +

Re: [PATCH net-next 1/3] ptp: Add adjphase function to support phase offset control.

2020-05-01 Thread Vincent Cheng
On Thu, Apr 30, 2020 at 11:37:34PM EDT, Richard Cochran wrote: >On Wed, Apr 29, 2020 at 08:28:23PM -0400, vincent.cheng...@renesas.com wrote: >> diff --git a/drivers/ptp/ptp_clock.c b/drivers/ptp/ptp_clock.c >> index acabbe7..c46ff98 100644 >> --- a/drivers/ptp/ptp_clock.c >> +++ b/drivers/ptp/ptp_