On Thu, Mar 25, 2021 at 6:51 PM Andrew Lunn wrote:
>
> On Thu, Mar 25, 2021 at 06:32:12PM +0530, Sunil Kovvuri wrote:
> > On Thu, Mar 25, 2021 at 6:20 PM Andrew Lunn wrote:
> > >
> > > > > So you completely skipped how this works with mv88e6xxx or
> >
On Thu, Mar 25, 2021 at 6:20 PM Andrew Lunn wrote:
>
> > > So you completely skipped how this works with mv88e6xxx or
> > > prestera. If you need this private flag for some out of mainline
> > > Marvell SDK, it is very unlikely to be accepted.
> > >
> > > Andrew
> >
> > What we are trying
> > > Hi Hariprasad
> > >
> > > Private flags sound very wrong here. I would expect to see some
> > > integration
> > > between the switchdev/DSA driver and the MAC driver.
> > > Please show how this works in combination with drivers/net/dsa/mv88e6xxx
> > > or drivers/net/ethernet/marvell/prestera
On Tue, Mar 23, 2021 at 6:26 PM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> When compile testing this driver on a platform on which probe() is
> known to fail at compile time, gcc warns about the cgx_lmactype_string[]
> array being uninitialized:
>
> In function 'strncpy',
> inlined from
On Tue, Mar 23, 2021 at 6:07 PM Colin King wrote:
>
> From: Colin Ian King
>
> Currently the error return path when lfs fails to allocate is not free'ing
> the memory allocated to buf. Fix this by adding the missing kfree.
>
> Addresses-Coverity: ("Resource leak")
> Fixes: f7884097141b ("octeontx
On Fri, Mar 5, 2021 at 4:15 PM Sunil Kovvuri wrote:
>
> Hi,
>
> We have a requirement where in we want RSS hashing to be done on packet fields
> which are not currently supported by the ethtool.
>
> Current options:
> ehtool -n rx-flow-hash
> tcp4|udp4|ah4|esp4|sctp4|t
On Sat, Mar 6, 2021 at 6:48 PM Vladimir Oltean wrote:
>
> On Sat, Mar 06, 2021 at 06:04:14PM +0530, Sunil Kovvuri wrote:
> > On Sat, Mar 6, 2021 at 5:47 AM Andrew Lunn wrote:
> > >
> > > On Fri, Mar 05, 2021 at 03:07:02PM -0800, Jakub Kicinski wrote:
> > &
On Sun, Mar 7, 2021 at 2:46 AM Tobias Waldekranz wrote:
>
> On Sat, Mar 06, 2021 at 14:54, Vladimir Oltean wrote:
> > On Sat, Mar 06, 2021 at 05:38:14PM +0530, Sunil Kovvuri wrote:
> >> > Can you share the format of the DSA tag? Is there a driver for it
> >> &g
On Sat, Mar 6, 2021 at 8:02 PM Andrew Lunn wrote:
>
> On Sat, Mar 06, 2021 at 06:04:14PM +0530, Sunil Kovvuri wrote:
> > On Sat, Mar 6, 2021 at 5:47 AM Andrew Lunn wrote:
> > >
> > > On Fri, Mar 05, 2021 at 03:07:02PM -0800, Jakub Kicinski wrote:
> > > &g
On Sat, Mar 6, 2021 at 5:47 AM Andrew Lunn wrote:
>
> On Fri, Mar 05, 2021 at 03:07:02PM -0800, Jakub Kicinski wrote:
> > On Fri, 5 Mar 2021 16:15:51 +0530 Sunil Kovvuri wrote:
> > > Hi,
> > >
> > > We have a requirement where in we want RSS hashing to be d
Hi,
We have a requirement where in we want RSS hashing to be done on packet fields
which are not currently supported by the ethtool.
Current options:
ehtool -n rx-flow-hash
tcp4|udp4|ah4|esp4|sctp4|tcp6|udp6|ah6|esp6|sctp6 m|v|t|s|d|f|n|r
Specifically our requirement is to calculate hash with D
On Fri, Feb 19, 2021 at 3:31 PM Dan Carpenter wrote:
>
> This code does not allocate enough memory for the NUL terminator so it
> ends up putting it one character beyond the end of the buffer.
>
> Fixes: 8756828a8148 ("octeontx2-af: Add NPA aura and pool contexts to
> debugfs")
> Signed-off-by: D
On Mon, Feb 15, 2021 at 11:27 PM Geetha sowjanya wrote:
>
> This patch fixes references to uninitialized variables and
> debugfs entry name for CN10K platform and HW_TSO flag check.
>
> Signed-off-by: Geetha sowjanya
> Signed-off-by: Sunil Goutham
>
> This patch fixes the bug introduced by the c
On Thu, Jan 21, 2021 at 5:26 PM Kevin Hao wrote:
>
> On Thu, Jan 21, 2021 at 09:53:08AM +, David Laight wrote:
> > From: Kevin Hao
> > > Sent: 21 January 2021 07:09
> > >
> > > The octeontx2 hardware needs the buffer to be 128 byte aligned.
> > > But in the current implementation of napi_alloc
On Thu, Jan 7, 2021 at 6:11 PM Colin King wrote:
>
> From: Colin Ian King
>
> Currently the error return paths don't kfree lmac and lmac->name
> leading to some memory leaks. Fix this by adding two error return
> paths that kfree these objects
>
> Addresses-Coverity: ("Resource leak")
> Fixes: 1
On Wed, Dec 2, 2020 at 12:28 PM Dan Carpenter wrote:
>
> These debugfs never return NULL so all this code will never be run.
>
> In the normal case, (and in this case particularly), the debugfs
> functions are not supposed to be checked for errors so all this error
> checking code can be safely de
On Sat, Nov 7, 2020 at 2:28 AM Saeed Mahameed wrote:
>
> On Fri, 2020-11-06 at 00:59 +0530, Sunil Kovvuri wrote:
> > > > > > Output:
> > > > > > # ./devlink health
> > > > > > pci/0002:01:00.0:
> > > > > >reporte
> > > > Output:
> > > > # ./devlink health
> > > > pci/0002:01:00.0:
> > > >reporter npa
> > > > state healthy error 0 recover 0
> > > >reporter nix
> > > > state healthy error 0 recover 0
> > > > # ./devlink health dump show pci/0002:01:00.0 reporter nix
> > > > NIX_AF_GENE
> -Original Message-
> From: Herbert Xu
> Sent: Friday, September 4, 2020 7:48 PM
> To: Srujana Challa
> Cc: da...@davemloft.net; netdev@vger.kernel.org; linux-
> cry...@vger.kernel.org; Suheil Chandran ;
> Narayana Prasad Raju Athreya ; Sunil Kovvuri
>
> -Original Message-
> From: Jiri Pirko
> Sent: Friday, September 4, 2020 5:41 PM
> To: Sunil Kovvuri Goutham
> Cc: Jakub Kicinski ; sundeep.l...@gmail.com;
> da...@davemloft.net; netdev@vger.kernel.org; Subbaraya Sundeep
> Bhatta
> Subject: Re: [EXT]
> -Original Message-
> From: Jiri Pirko
> Sent: Friday, September 4, 2020 2:07 PM
> To: Sunil Kovvuri Goutham
> Cc: Jakub Kicinski ; sundeep.l...@gmail.com;
> da...@davemloft.net; netdev@vger.kernel.org; Subbaraya Sundeep
> Bhatta
> Subject: Re: [EXT]
> -Original Message-
> From: Jakub Kicinski
> Sent: Friday, September 4, 2020 12:48 AM
> To: sundeep.l...@gmail.com
> Cc: da...@davemloft.net; netdev@vger.kernel.org; Sunil Kovvuri Goutham
> ; Subbaraya Sundeep Bhatta
>
> Subject: [EXT] Re: [net-next P
On Mon, Jul 13, 2020 at 6:57 PM Richard Cochran
wrote:
>
> On Mon, Jul 13, 2020 at 11:40:34AM +0530, sundeep subbaraya wrote:
> > > > +static int otx2_ioctl(struct net_device *netdev, struct ifreq *req,
> > > > int cmd)
> > > > +{
> > > > + struct otx2_nic *pfvf = netdev_priv(netdev);
> > > >
On Fri, May 8, 2020 at 9:43 AM Kevin Hao wrote:
>
> In the current codes, the octeontx2 uses its own method to allocate
> the pool buffers, but there are some issues in this implementation.
> 1. We have to run the otx2_get_page() for each allocation cycle and
>this is pretty error prone. As I
On Fri, May 8, 2020 at 11:00 AM Kevin Hao wrote:
>
> On Fri, May 08, 2020 at 10:18:27AM +0530, Sunil Kovvuri wrote:
> > On Fri, May 8, 2020 at 9:43 AM Kevin Hao wrote:
> > >
> > > In the current codes, the octeontx2 uses its own method to allocate
> > &g
On Fri, May 8, 2020 at 9:43 AM Kevin Hao wrote:
>
> In the current codes, the octeontx2 uses its own method to allocate
> the pool buffers, but there are some issues in this implementation.
> 1. We have to run the otx2_get_page() for each allocation cycle and
>this is pretty error prone. As I
From: Geetha sowjanya
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup
resources held by that PF_FUNC. This patch cleans up,
NIX LF
- Stop ingress/egress traffic
- Disable NPC MCAM entries being used.
- Free Tx scheduler queues
- Disable RQ/SQ/CQ HW contexts
NPA LF
- Disable Pool/Aur
From: Tomasz Duszynski
This works by shadowing existing UCAST MCAM entry
with a new one additionally matching either NPC_LT_LB_CTAG
or NPC_LT_LB_STAG. For this to fully work one needs to
send properly configured NIX_VTAG_CFG message afterwards i.e with
strip and capture enabled and type set to 0.
From: Sunil Goutham
For a PF/VF with a NIXLF attached has default/reserved MCAM entries
for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
forwarded to NIXLF only after it's contexts are initialized. This
patch keeps these default entries disabled and adds mbox messages
for a PF
From: Sunil Goutham
Added support to handle FLR for AF's VFs (i.e LBK VFs).
Just the FLR interrupt enable/disable, handler registration
etc, actual HW resource cleanup or LFs teardown logic is
already there.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 129
From: Sunil Goutham
While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
drivers/
From: Linu Cherian
- Add interrupt handlers for Master Enable events from PFs
and Master Enable events from VFs of AF
- Master Enable is required for the MSIX delivery to work
- Master Enable bit trap handler doesn't have to do any anything
other than clearing the TRPEND bit, since the enable
From: Tomasz Duszynski
Configure AF VFs such that they are able to talk over consecutive
loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX
lbk0 -> lbk1
lbk1 -> lbk0
lbk2 -> lbk3
lbk3 -> lbk2
lbk4 -> lbk5
lbk5 -> lbk4
lbk6 -> lbk7
lbk7 -> lbk6
S
From: Tomasz Duszynski
Enable all AF VFs during probe. Since AF's VFs work in pairs
(eg: Pkts sent on VF0 are received by VF1 and viceversa),
enable only even number of VFs out of totalVFs, which should
again be less than number of loopback (LBK) channels.
Also enable VF's mailbox interrupts.
S
From: Geetha sowjanya
RVU admin function (AF) has all the priviliges to cleanup
HW state when VFIO triggers a PCIe function level reset (FLR)
due to either reset or a VM crash. FLR for RVU PF1-PFn will
trigger an IRQ to AF.
This patch enables all RVU PF's FLR interrupts and registers a
handler.
From: Tomasz Duszynski
VFs attached to PFs other than AF can not communicate with AF
directly. Instead they are supposed to first send message to
the PF they are residing on and PF forwards it to the AF.
Responses to messages are handled in the reverse order.
On the other hand if VFs are on AF (
From: Sunil Goutham
Errata 35038
Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets
the RX data path before configuration changes (e.g. disabling one or
more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [
From: Santosh Shukla
Added basic default MKEX profile. This profile tells
hardware what data to extract from packet and where to
place it (bit offset) in final KEY generated for the
parsed packet. Based on the bit placement of the packet
data, MCAM entries have to programmed for matching.
Also a
From: Sunil Goutham
A new mailbox message is added to support allocating a MCAM entry
along with a counter and configuring it in one go. This reduces
the amount of mailbox communication involved in installing a new
MCAM rule.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeon
From: Sunil Goutham
This patch adds support for RVU PF/VFs to modify min/max
packet lengths allowed by HW. For VFs on PF0, settings will
be automatically applied on LBK link. RX link's min/maxlen
is configured to min/max of PF and it's all VFs. On the TX side
if requested all SMQs attached to the
From: Sunil Goutham
This patch converts all mailbox message handler API
names to lowercase.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.c | 2 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 73 --
drivers/net/ethernet/marvell/
From: Sunil Goutham
Add support for a RVU PF/VF to enable, disable, configure
and shuffle MCAM entries via mbox commands. This patch adds
mailbox message formats and handling of these commands.
As of now otherthan validating MCAM entry index, info like
channel number e.t.c in MCAM config data se
From: Kiran Kumar
This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.
Signed-off-by: Kiran Kumar
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h| 4
drivers
From: Sunil Goutham
This patch adds NPC MCAM entry management and support for
allocating and freeing them via mailbox. Both contiguous and
non-contiguous allocations are supported. Incase of contiguous,
if request cannot be met then max contiguous number of available
entries are allocated.
High
From: Sunil Goutham
NPC HW has counters which can be mapped to MCAM
entries to gather entry match statistics. This
patch adds support to allocate, free, clear and retrieve
stats of NPC MCAM counters. New mailbox messages have
been added for this. Similar to MCAM entries both
contiguous and non-co
From: Sunil Goutham
Alloc memory to save MCAM 'entry to counter' mapping and since
multiple entries can map to same counter, added counter's reference
count tracking.
Do 'entry to counter' mapping when a entry is being installed
and mbox msg sender requested to configure a counter as well.
Mappi
From: Stanislaw Kardach
Mailbox message handling is done in a workqueue context scheduled
from interrupt handler. So resource locks does not need to be a spinlock.
Therefore relax them into a mutex so that later on we may use them
in routines that might sleep.
Signed-off-by: Stanislaw Kardach
S
From: Sunil Goutham
This patchset is a continuation to earlier submitted three patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
https://www.spinics.net/lists/netdev/msg528272
On Sat, Nov 17, 2018 at 12:50 PM David Miller wrote:
>
> From: sunil.kovv...@gmail.com
> Date: Thu, 15 Nov 2018 16:29:29 +0530
>
> > From: Stanislaw Kardach
> >
> > The resource locks does not need to be a spinlock as they are not
> > used in any interrupt handling routines (only in bottom halves
From: Tomasz Duszynski
Enable all AF VFs during probe. Since AF's VFs work in pairs
(eg: Pkts sent on VF0 are received by VF1 and viceversa),
enable only even number of VFs out of totalVFs, which should
again be less than number of loopback (LBK) channels.
Also enable VF's mailbox interrupts.
S
From: Linu Cherian
- Add interrupt handlers for Master Enable events from PFs
and Master Enable events from VFs of AF
- Master Enable is required for the MSIX delivery to work
- Master Enable bit trap handler doesn't have to do any anything
other than clearing the TRPEND bit, since the enable
From: Sunil Goutham
Errata 35038
Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets
the RX data path before configuration changes (e.g. disabling one or
more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [
From: Geetha sowjanya
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup
resources held by that PF_FUNC. This patch cleans up,
NIX LF
- Stop ingress/egress traffic
- Disable NPC MCAM entries being used.
- Free Tx scheduler queues
- Disable RQ/SQ/CQ HW contexts
NPA LF
- Disable Pool/Aur
From: Tomasz Duszynski
VFs attached to PFs other than AF can not communicate with AF
directly. Instead they are supposed to first send message to
the PF they are residing on and PF forwards it to the AF.
Responses to messages are handled in the reverse order.
On the other hand if VFs are on AF (
From: Sunil Goutham
Added support to handle FLR for AF's VFs (i.e LBK VFs).
Just the FLR interrupt enable/disable, handler registration
etc, actual HW resource cleanup or LFs teardown logic is
already there.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 129
From: Santosh Shukla
Added basic default MKEX profile. This profile tells
hardware what data to extract from packet and where to
place it (bit offset) in final KEY generated for the
parsed packet. Based on the bit placement of the packet
data, MCAM entries have to programmed for matching.
Also a
From: Geetha sowjanya
RVU admin function (AF) has all the priviliges to cleanup
HW state when VFIO triggers a PCIe function level reset (FLR)
due to either reset or a VM crash. FLR for RVU PF1-PFn will
trigger an IRQ to AF.
This patch enables all RVU PF's FLR interrupts and registers a
handler.
From: Sunil Goutham
While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
drivers/
From: Sunil Goutham
NPC HW has counters which can be mapped to MCAM
entries to gather entry match statistics. This
patch adds support to allocate, free, clear and retrieve
stats of NPC MCAM counters. New mailbox messages have
been added for this. Similar to MCAM entries both
contiguous and non-co
From: Tomasz Duszynski
This works by shadowing existing UCAST MCAM entry
with a new one additionally matching either NPC_LT_LB_CTAG
or NPC_LT_LB_STAG. For this to fully work one needs to
send properly configured NIX_VTAG_CFG message afterwards i.e with
strip and capture enabled and type set to 0.
From: Tomasz Duszynski
Configure AF VFs such that they are able to talk over consecutive
loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX
lbk0 -> lbk1
lbk1 -> lbk0
lbk2 -> lbk3
lbk3 -> lbk2
lbk4 -> lbk5
lbk5 -> lbk4
lbk6 -> lbk7
lbk7 -> lbk6
S
From: Sunil Goutham
A new mailbox message is added to support allocating a MCAM entry
along with a counter and configuring it in one go. This reduces
the amount of mailbox communication involved in installing a new
MCAM rule.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeon
From: Sunil Goutham
Alloc memory to save MCAM 'entry to counter' mapping and since
multiple entries can map to same counter, added counter's reference
count tracking.
Do 'entry to counter' mapping when a entry is being installed
and mbox msg sender requested to configure a counter as well.
Mappi
From: Sunil Goutham
For a PF/VF with a NIXLF attached has default/reserved MCAM entries
for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
forwarded to NIXLF only after it's contexts are initialized. This
patch keeps these default entries disabled and adds mbox messages
for a PF
From: Kiran Kumar
This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.
Signed-off-by: Kiran Kumar
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h| 4
drivers
From: Sunil Goutham
Add support for a RVU PF/VF to enable, disable, configure
and shuffle MCAM entries via mbox commands. This patch adds
mailbox message formats and handling of these commands.
As of now otherthan validating MCAM entry index, info like
channel number e.t.c in MCAM config data se
From: Stanislaw Kardach
The resource locks does not need to be a spinlock as they are not
used in any interrupt handling routines (only in bottom halves).
Therefore relax them into a mutex so that later on we may use them
in routines that might sleep.
Signed-off-by: Stanislaw Kardach
Signed-off
From: Sunil Goutham
This patch adds NPC MCAM entry management and support for
allocating and freeing them via mailbox. Both contiguous and
non-contiguous allocations are supported. Incase of contiguous,
if request cannot be met then max contiguous number of available
entries are allocated.
High
From: Sunil Goutham
This patch converts all mailbox message handler API
names to lowercase.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.c | 2 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 73 --
drivers/net/ethernet/marvell/
From: Sunil Goutham
This patchset is a continuation to earlier submitted three patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
https://www.spinics.net/lists/netdev/msg528272
From: Sunil Goutham
This patch adds support for RVU PF/VFs to modify min/max
packet lengths allowed by HW. For VFs on PF0, settings will
be automatically applied on LBK link. RX link's min/maxlen
is configured to min/max of PF and it's all VFs. On the TX side
if requested all SMQs attached to the
On Sat, Nov 10, 2018 at 2:36 AM Arnd Bergmann wrote:
>
> On Fri, Nov 9, 2018 at 6:13 PM Sunil Kovvuri wrote:
> > On Fri, Nov 9, 2018 at 4:32 PM Arnd Bergmann wrote:
> > > On Fri, Nov 9, 2018 at 5:21 AM Sunil Kovvuri
> > > wrote:
>
> > >
> > >
On Fri, Nov 9, 2018 at 4:32 PM Arnd Bergmann wrote:
>
> On Fri, Nov 9, 2018 at 5:21 AM Sunil Kovvuri wrote:
> >
> > On Fri, Nov 9, 2018 at 2:13 AM Arnd Bergmann wrote:
> > >
> > > On Thu, Nov 8, 2018 at 7:37 PM wrote:
> > > > @@ -66
On Fri, Nov 9, 2018 at 4:42 PM Arnd Bergmann wrote:
>
> On Fri, Nov 9, 2018 at 5:29 AM Sunil Kovvuri wrote:
> > On Fri, Nov 9, 2018 at 2:17 AM Arnd Bergmann wrote:
> > > On Thu, Nov 8, 2018 at 7:37 PM wrote:
>
> > >
> > > Here is another instance
On Fri, Nov 9, 2018 at 2:32 AM Arnd Bergmann wrote:
>
> On Thu, Nov 8, 2018 at 7:36 PM wrote:
> >
> > From: Sunil Goutham
>
> Hmm, I noticed that you use a different address as the patch author
> and the submitter. I'm guessing that "Sunil Goutham" a
On Fri, Nov 9, 2018 at 2:17 AM Arnd Bergmann wrote:
>
> On Thu, Nov 8, 2018 at 7:37 PM wrote:
>
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
> > b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
> > index f98b011..3f7e5e6 100644
> > --- a/drivers/net/ethernet/marvell/octeontx
On Fri, Nov 9, 2018 at 2:13 AM Arnd Bergmann wrote:
>
> On Thu, Nov 8, 2018 at 7:37 PM wrote:
> > @@ -666,4 +668,20 @@ struct npc_mcam_unmap_counter_req {
> > u8 all; /* Unmap all entries using this counter ? */
> > };
> >
> > +struct npc_mcam_alloc_and_write_entry_req {
> > + s
From: Tomasz Duszynski
Enable all AF VFs during probe. Since AF's VFs work in pairs
(eg: Pkts sent on VF0 are received by VF1 and viceversa),
enable only even number of VFs out of totalVFs, which should
again be less than number of loopback (LBK) channels.
Also enable VF's mailbox interrupts.
S
From: Tomasz Duszynski
VFs attached to PFs other than AF can not communicate with AF
directly. Instead they are supposed to first send message to
the PF they are residing on and PF forwards it to the AF.
Responses to messages are handled in the reverse order.
On the other hand if VFs are on AF (
From: Tomasz Duszynski
Configure AF VFs such that they are able to talk over consecutive
loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX
lbk0 -> lbk1
lbk1 -> lbk0
lbk2 -> lbk3
lbk3 -> lbk2
lbk4 -> lbk5
lbk5 -> lbk4
lbk6 -> lbk7
lbk7 -> lbk6
S
From: Geetha sowjanya
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup
resources held by that PF_FUNC. This patch cleans up,
NIX LF
- Stop ingress/egress traffic
- Disable NPC MCAM entries being used.
- Free Tx scheduler queues
- Disable RQ/SQ/CQ HW contexts
NPA LF
- Disable Pool/Aur
From: Sunil Goutham
Added support to handle FLR for AF's VFs (i.e LBK VFs).
Just the FLR interrupt enable/disable, handler registration
etc, actual HW resource cleanup or LFs teardown logic is
already there.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 129
From: Geetha sowjanya
All RVU PF's upon receiving a FLR will trigger an IRQ to RVU AF.
This patch enables all RVU PF's FLR interrupt and registers a
handler. Upon receiving an IRQ a workqueue is scheduled to
cleanup all RVU blocks being used by the PF/VF which received
the FLR.
Signed-off-by: Ge
From: Sunil Goutham
Errata 35038
Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets
the RX data path before configuration changes (e.g. disabling one or
more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [
From: Linu Cherian
- Add interrupt handlers for Master Enable events from PFs
and Master Enable events from VFs of AF
- Master Enable is required for the MSIX delivery to work
- Master Enable bit trap handler doesn't have to do any anything
other than clearing the TRPEND bit, since the enable
From: Tomasz Duszynski
This works by shadowing existing UCAST MCAM entry
with a new one additionally matching either NPC_LT_LB_CTAG
or NPC_LT_LB_STAG. For this to fully work one needs to
send properly configured NIX_VTAG_CFG message afterwards i.e with
strip and capture enabled and type set to 0.
From: Sunil Goutham
NPC HW has counters which can be mapped to MCAM
entries to gather entry match statistics. This
patch adds support to allocate, free, clear and retrieve
stats of NPC MCAM counters. New mailbox messages have
been added for this. Similar to MCAM entries both
contiguous and non-co
From: Sunil Goutham
While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
drivers/
From: Santosh Shukla
Added basic default MKEX profile. This profile tells
hardware what data to extract from packet and where to
place it (bit offset) in final KEY generated for the
parsed packet. Based on the bit placement of the packet
data, MCAM entries have to programmed for matching.
Also a
From: Sunil Goutham
For a PF/VF with a NIXLF attached has default/reserved MCAM entries
for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
forwarded to NIXLF only after it's contexts are initialized. This
patch keeps these default entries disabled and adds mbox messages
for a PF
From: Sunil Goutham
This patch adds NPC MCAM entry management and support for
allocating and freeing them via mailbox. Both contiguous and
non-contiguous allocations are supported. Incase of contiguous,
if request cannot be met then max contiguous number of available
entries are allocated.
High
From: Sunil Goutham
Alloc memory to save MCAM 'entry to counter' mapping and since
multiple entries can map to same counter, added counter's reference
count tracking.
Do 'entry to counter' mapping when a entry is being installed
and mbox msg sender requested to configure a counter as well.
Mappi
From: Sunil Goutham
Add support for a RVU PF/VF to enable, disable, configure
and shuffle MCAM entries via mbox commands. This patch adds
mailbox message formats and handling of these commands.
As of now otherthan validating MCAM entry index, info like
channel number e.t.c in MCAM config data se
From: Sunil Goutham
A new mailbox message is added to support allocating a MCAM entry
along with a counter and configuring it in one go. This reduces
the amount of mailbox communication involved in installing a new
MCAM rule.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeon
From: Stanislaw Kardach
The resource locks does not need to be a spinlock as they are not
used in any interrupt handling routines (only in bottom halves).
Therefore relax them into a mutex so that later on we may use them
in routines that might sleep.
Signed-off-by: Stanislaw Kardach
Signed-off
From: Sunil Goutham
This patch adds support for RVU PF/VFs to modify min/max
packet lengths allowed by HW. For VFs on PF0, settings will
be automatically applied on LBK link. RX link's min/maxlen
is configured to min/max of PF and it's all VFs. On the TX side
if requested all SMQs attached to the
From: Kiran Kumar
This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.
Signed-off-by: Kiran Kumar
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h| 4
drivers
From: Sunil Goutham
This patchset is a continuation to earlier submitted three patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
https://www.spinics.net/lists/netdev/msg528272
On Sat, Oct 27, 2018 at 12:59 AM Arnd Bergmann wrote:
>
> On Fri, Oct 26, 2018 at 6:33 PM Sunil Kovvuri wrote:
> > On Fri, Oct 26, 2018 at 9:56 PM Sunil Kovvuri
> > wrote:
> > > On Fri, Oct 26, 2018 at 7:34 PM Arnd Bergmann wrote:
> > > > > On 10/26/
On Fri, Oct 26, 2018 at 9:56 PM Sunil Kovvuri wrote:
>
> On Fri, Oct 26, 2018 at 7:34 PM Arnd Bergmann wrote:
> >
> > On 10/26/18, Sunil Kovvuri wrote:
> > > On Fri, Oct 26, 2018 at 6:24 PM Arnd Bergmann wrote:
> > >>
> > >> I see this has be
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