Adds a new mailbox to get CPT stats, includes performance
counters, CPT engines status and RXC status.
Signed-off-by: Narayana Prasad Raju Atherya
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/mbox.h | 48
.../ethernet/marvell/octeontx2/af/rvu_cpt.c | 112
Adds changes to existing CPT mailbox messages to support
CN10K CPT block. This patch also adds new register defines
for CN10K CPT.
Signed-off-by: Vidya Sagar Velumuri
Signed-off-by: Srujana Challa
---
.../ethernet/marvell/octeontx2/af/rvu_cpt.c | 11 +-
.../ethernet/marvell/octeontx2
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/mbox.h | 13
.../ethernet/marvell/octeontx2/af/rvu_cpt.c | 68 +--
2 files changed, 74 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
b/drivers/net/ethernet
OcteonTX3 (CN10K) silicon is a Marvell next-gen silicon. CN10K CPT
introduces new features like reassembly support and some feature
enhancements.
This patchset adds new mailbox messages and some minor changes to
existing mailbox messages to support CN10K CPT.
Srujana Challa (3):
octeontx2-af
: Suheil Chandran
Signed-off-by: Sunil Kovvuri Goutham
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.c | 3 +
.../net/ethernet/marvell/octeontx2/af/rvu.h | 2 +
.../ethernet/marvell/octeontx2/af/rvu_cpt.c | 89 +++
.../ethernet/marvell
ddress out of multiple
blocks of same type. If a PF/VF needs to configure
LFs from both the blocks then this mbox should be
called twice.
Signed-off-by: Mahipal Challa
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/mbox.h | 2 +
.../ethernet/marvell/octeon
Adds support to display block CPT1 stats at
"/sys/kernel/debug/octeontx2/cpt1".
Signed-off-by: Mahipal Challa
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.h | 7 ++
.../marvell/octeontx2/af/rvu_debugfs.c| 86 +--
2 files c
OcteonTX2 series of silicons have multiple variants, the
98xx variant has two crypto (CPT) blocks to double the crypto
performance. This patchset adds support for new CPT block(CPT1).
Srujana Challa (3):
octeontx2-af: Mailbox changes for 98xx CPT block
octeontx2-af: Add support for CPT1 in
> On Wed, 2021-01-13 at 20:50 +0530, Srujana Challa wrote:
> > Adds support to display block CPT1 stats at
> > "/sys/kernel/debug/octeontx2/cpt1".
> >
> > Signed-off-by: Mahipal Challa
> > Signed-off-by: Srujana Challa
> > ---
> &
> On Wed, 2021-01-13 at 20:50 +0530, Srujana Challa wrote:
> > This patch changes CPT mailbox message format to support new block
> > CPT1 in 98xx silicon.
> >
> > cpt_rd_wr_reg ->
> > Modify cpt_rd_wr_reg mailbox and its handler to
> > ac
: Suheil Chandran
Signed-off-by: Sunil Kovvuri Goutham
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.c | 3 +
.../net/ethernet/marvell/octeontx2/af/rvu.h | 2 +
.../ethernet/marvell/octeontx2/af/rvu_cpt.c | 74 +++
.../ethernet/marvell
Adds support to display block CPT1 stats at
"/sys/kernel/debug/octeontx2/cpt1".
Signed-off-by: Mahipal Challa
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/af/rvu_debugfs.c| 45 +++
1 file changed, 26 insertions(+), 19 deletions(-)
diff --git a/d
ddress out of multiple
blocks of same type. If a PF/VF needs to configure
LFs from both the blocks then this mbox should be
called twice.
Signed-off-by: Mahipal Challa
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/mbox.h | 2 +
.../ethernet/marvell/octeon
OcteonTX2 series of silicons have multiple variants, the
98xx variant has two crypto (CPT) blocks to double the crypto
performance. This patchset adds support for new CPT block(CPT1).
Srujana Challa (3):
octeontx2-af: Mailbox changes for 98xx CPT block
octeontx2-af: Add support for CPT1 in
cpt_err_info: dump cpt error registers.
Usage:
cat /sys/kernel/debug/octeontx2/cpt/cpt_err_info
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.h | 1 +
.../marvell/octeontx2/af/rvu_debugfs.c| 272 ++
2 files changed
adds hardware CPT AF register defines.
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
.../ethernet/marvell/octeontx2/af/Makefile| 3 +-
.../net/ethernet/marvell/octeontx2/af/mbox.h | 33 +++
.../ethernet/marvell/octeontx2/af/rvu_cpt.c
: Suheil Chandran
Signed-off-by: Srujana Challa
---
MAINTAINERS | 2 ++
.../marvell/octeontx2/nic/otx2_common.h | 13 +
include/linux/soc/marvell/octeontx2/asm.h | 29 +++
3 files changed, 32 insertions(+), 12 deletions
arnings.
* Added code to exit CPT VF driver gracefully.
* Moved OcteonTx2 asm code to a header file under include/linux/soc/
Changes since v1:
* Moved Makefile changes from patch4 to patch2 and patch3.
Srujana Challa (3):
octeontx2-pf: move lmt flush to include/linux/soc
octeontx2-af: add m
> On Fri, Nov 13, 2020 at 08:44:40AM -0800, Jakub Kicinski wrote:
> >
> > SGTM, actually everything starting from patch 4 is in drivers/crypto,
> > so we can merge the first 3 into net-next and the rest via crypto?
>
> Yes of course.
>
Thanks I will resubmit patches 4-12 on crypto-2.6 in the next
> On Mon, 9 Nov 2020 17:39:17 +0530 Srujana Challa wrote:
> > + err = pci_alloc_irq_vectors(pdev, RVU_PF_INT_VEC_CNT,
> > + RVU_PF_INT_VEC_CNT, PCI_IRQ_MSIX);
>
> I don't see any pci_free_irq_vectors() in this patch
This will be handled
ff-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 4 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 56 +++
drivers/crypto/marvell/octeontx2/otx2_cptlf.c | 429 ++
drivers/crypto/marvell/octe
Attach LFs to CPT VF to process the crypto requests and register
LF interrupts.
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 3
Adds support to get engine capabilities and adds a new mailbox
to share capabilities with VF driver.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 36
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 51 ++
drivers
)),
authenc(hmac(sha512),ecb(cipher_null)),
rfc4106(gcm(aes)).
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig|4 +
drivers/crypto/marvell/octeontx2/Makefile |3 +-
.../marvell/octeontx2
Add support for the Marvell OcteonTX2 CPT virtual function
driver. This patch includes probe, PCI specific initialization
and interrupt handling.
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 4
AEs), and configures
all engines.
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile |2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 42 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 77
off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 3 +-
.../marvell/octeontx2/otx2_cpt_common.h | 4 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 37 +++
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 12 +++
.../m
cpt_err_info: dump cpt error registers.
Usage:
cat /sys/kernel/debug/octeontx2/cpt/cpt_err_info
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.h | 1 +
.../marvell/octeontx2/af/rvu_debugfs.c| 272 ++
2 files changed
adds support for this 'VF <=> PF <=> AF' mailbox
communication.
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 1 +
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 19 ++
.
.
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig| 10 +
drivers/crypto/marvell/Makefile | 1 +
drivers/crypto/marvell/octeontx2/Makefile | 6 +
.../marvell/octeontx2
adds hardware CPT AF register defines.
Signed-off-by: Suheil Chandran
Signed-off-by: Lukasz Bartosik
Signed-off-by: Srujana Challa
---
.../ethernet/marvell/octeontx2/af/Makefile| 3 +-
.../net/ethernet/marvell/octeontx2/af/mbox.h | 33 +++
.../ethernet/marvell/octeontx2/af/rvu_cpt.c
: Suheil Chandran
Signed-off-by: Srujana Challa
---
MAINTAINERS | 2 ++
.../marvell/octeontx2/nic/otx2_common.h | 13 +
include/linux/soc/marvell/octeontx2/asm.h | 29 +++
3 files changed, 32 insertions(+), 12 deletions
ince v3:
* Splitup the patches into smaller patches with more informartion.
Changes since v2:
* Fixed C=1 warnings.
* Added code to exit CPT VF driver gracefully.
* Moved OcteonTx2 asm code to a header file under include/linux/soc/
Changes since v1:
* Moved Makefile changes from patch4 to patch2 an
> On Wed, Oct 28, 2020 at 10:44 PM Srujana Challa wrote:
> >
> > On OcteonTX2 SoC, the admin function (AF) is the only one with all
> > priviliges to configure HW and alloc resources, PFs and it's VFs
> > have to request AF via mailbox for all their needs. This pa
> On Wed, Oct 28, 2020 at 6:50 PM Srujana Challa wrote:
> >
> > This series introduces crypto(CPT) drivers(PF & VF) for Marvell OcteonTX2
> > CN96XX Soc.
> >
> > OcteonTX2 SOC's resource virtualization unit (RVU) supports multiple
> > phy
> Subject: Re: [PATCH v8,net-next,00/12] Add Support for Marvell OcteonTX2
>
> On Sat, 31 Oct 2020 15:28:59 -0400 Willem de Bruijn wrote:
> > The point about parsing tar files remains open. In general error-prone
> > parsing is better left to userspace.
>
> The tar files have to go. Srujana said
ff-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../ethernet/marvell/octeontx2/af/Makefile| 3 +-
.../net/ethernet/marvell/octeontx2/af/mbox.h | 33 +++
.../net/ethernet/marvell/octeontx2/af/rvu.c | 2 +-
.../net/ethernet/marvell/octeontx2/af/rvu.h | 1 +
.../ethernet/ma
Add support for the Marvell OcteonTX2 CPT virtual function
driver. This patch includes probe, PCI specific initialization
and interrupt handling.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 4 +-
.../marvell/octeontx2
cpt_err_info: dump cpt error registers.
Usage:
cat /sys/kernel/debug/octeontx2/cpt/cpt_err_info
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.h | 1 +
.../marvell/octeontx2/af/rvu_debugfs.c| 304 ++
2 files changed
off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 3 +-
.../marvell/octeontx2/otx2_cpt_common.h | 4 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 37 +++
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 12 +++
.../marvell/octeontx2/otx2_cptpf_
CPT RVU Local Functions(LFs) needs to be attached to the
PF/VF to submit the instructions to CPT.
This patch adds the interface to initialize and attach
the LFs. It also adds interface to register the LF's
interrupts.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
dr
: Suheil Chandran
Signed-off-by: Srujana Challa
---
MAINTAINERS | 2 ++
.../marvell/octeontx2/nic/otx2_common.h | 13 +
include/linux/soc/marvell/octeontx2/asm.h | 29 +++
3 files changed, 32 insertions(+), 12 deletions
ion.
Changes since v2:
* Fixed C=1 warnings.
* Added code to exit CPT VF driver gracefully.
* Moved OcteonTx2 asm code to a header file under include/linux/soc/
Changes since v1:
* Moved Makefile changes from patch4 to patch2 and patch3.
Srujana Challa (12):
octeontx2-pf: move lmt flush to i
AEs), and configures
all engines.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile |2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 42 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 77 +
drivers/crypto/marvell
Adds support to get engine capabilities and adds a new mailbox
to share capabilities with VF driver.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 36
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 51 ++
drivers
Attach LFs to CPT VF to process the crypto requests and register
LF interrupts.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 3 +
.../marvell/octeontx2
.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig| 10 +
drivers/crypto/marvell/Makefile | 1 +
drivers/crypto/marvell/octeontx2/Makefile | 6 +
.../marvell/octeontx2/otx2_cpt_common.h | 32
adds support for this 'VF <=> PF <=> AF' mailbox
communication.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 1 +
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 19 ++
.../marvell/o
)),
authenc(hmac(sha512),ecb(cipher_null)),
rfc4106(gcm(aes)).
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig|4 +
drivers/crypto/marvell/octeontx2/Makefile |3 +-
.../marvell/octeontx2/otx2_cpt_reqmgr.h |1
)),
authenc(hmac(sha512),ecb(cipher_null)),
rfc4106(gcm(aes)).
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig|4 +
drivers/crypto/marvell/octeontx2/Makefile |3 +-
.../marvell/octeontx2/otx2_cpt_reqmgr.h |1
Adds support to get engine capabilities and adds a new mailbox
to share capabilities with VF driver.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 36
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 51 ++
drivers
AEs), and configures
all engines.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile |2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 42 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 77 +
drivers/crypto/marvell
CPT RVU Local Functions(LFs) needs to be attached to the
PF/VF to submit the instructions to CPT.
This patch adds the interface to initialize and attach
the LFs. It also adds interface to register the LF's
interrupts.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
dr
Add support for the Marvell OcteonTX2 CPT virtual function
driver. This patch includes probe, PCI specific initialization
and interrupt handling.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 4 +-
.../marvell/octeontx2
Attach LFs to CPT VF to process the crypto requests and register
LF interrupts.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 3 +
.../marvell/octeontx2
off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 3 +-
.../marvell/octeontx2/otx2_cpt_common.h | 4 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 37 +++
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 12 +++
.../marvell/octeontx2/otx2_cptpf_
adds support for this 'VF <=> PF <=> AF' mailbox
communication.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 1 +
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 19 ++
.../marvell/o
cpt_err_info: dump cpt error registers.
Usage:
cat /sys/kernel/debug/octeontx2/cpt/cpt_err_info
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.h | 1 +
.../marvell/octeontx2/af/rvu_debugfs.c| 304 ++
2 files changed
ff-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../ethernet/marvell/octeontx2/af/Makefile| 3 +-
.../net/ethernet/marvell/octeontx2/af/mbox.h | 33 +++
.../net/ethernet/marvell/octeontx2/af/rvu.c | 2 +-
.../net/ethernet/marvell/octeontx2/af/rvu.h | 1 +
.../ethernet/ma
ion.
Changes since v2:
* Fixed C=1 warnings.
* Added code to exit CPT VF driver gracefully.
* Moved OcteonTx2 asm code to a header file under include/linux/soc/
Changes since v1:
* Moved Makefile changes from patch4 to patch2 and patch3.
Srujana Challa (12):
octeontx2-pf: move lmt flush to i
.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig| 10 +
drivers/crypto/marvell/Makefile | 1 +
drivers/crypto/marvell/octeontx2/Makefile | 6 +
.../marvell/octeontx2/otx2_cpt_common.h | 32
: Suheil Chandran
Signed-off-by: Srujana Challa
---
MAINTAINERS | 2 ++
.../marvell/octeontx2/nic/otx2_common.h | 13 +
include/linux/soc/marvell/octeontx2/asm.h | 29 +++
3 files changed, 32 insertions(+), 12 deletions
> Subject: [EXT] Re: [PATCH v7,net-next,04/13] drivers: crypto: add Marvell
> OcteonTX2 CPT PF driver
>
> External Email
>
> --
> On Mon, 12 Oct 2020 16:27:10 +0530 Srujana Challa wrote:
> > +
> Subject: [EXT] Re: [PATCH v7,net-next,07/13] crypto: octeontx2: load microcode
> and create engine groups
>
> External Email
>
> --
> On Mon, 12 Oct 2020 16:27:13 +0530 Srujana Challa wrote:
> > +
CPT RVU Local Functions(LFs) needs to be attached to the
PF/VF to submit the instructions to CPT.
This patch adds the interface to initialize and attach
the LFs. It also adds interface to register the LF's
interrupts.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
dr
Add new mailbox message to configure a LF for RX inline-IPsec.
This message is added to serve Marvell CPT VFIO driver, since
a VF can not send mailbox messages to admin function(AF)
directly.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2
Adds support to get engine capabilities and adds a new mailbox
to share the engine capabilities to CPT VFIO drivers.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 36
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 51
Add support for the Marvell OcteonTX2 CPT virtual function
driver. This patch includes probe, PCI specific initialization
and interrupt handling.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 4 +-
.../marvell/octeontx2
)),
authenc(hmac(sha512),ecb(cipher_null)),
rfc4106(gcm(aes)).
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig|4 +
drivers/crypto/marvell/octeontx2/Makefile |3 +-
.../marvell/octeontx2/otx2_cpt_reqmgr.h |1
Attach LFs to CPT VF to process the crypto requests and register
LF interrupts.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 2 +-
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 145 +
drivers/crypto/marvell/octeontx2
off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 3 +-
.../marvell/octeontx2/otx2_cpt_common.h | 4 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 37 +++
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 12 +++
.../marvell/octeontx2/otx2_cptpf_
AEs), and configures
all engines.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile |2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 42 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 77 +
drivers/crypto/marvell
adds support for this 'VF <=> PF <=> AF' mailbox
communication.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 1 +
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 19 ++
.../marvell/o
.
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig| 10 +
drivers/crypto/marvell/Makefile | 1 +
drivers/crypto/marvell/octeontx2/Makefile | 6 +
.../marvell/octeontx2/otx2_cpt_common.h | 32
IPsec.
Inline-IPsec mailbox messages are added here to provide the interface
to Marvell VFIO drivers to allocate and configure HW resources
for inline IPsec feature.
Signed-off-by: Suheil Chandran
Signed-off-by: Vidya Sagar Velumuri
Signed-off-by: Srujana Challa
---
.../ethernet/marvell/octeont
: Suheil Chandran
Signed-off-by: Srujana Challa
---
MAINTAINERS | 2 ++
.../marvell/octeontx2/nic/otx2_common.h | 13 +
include/linux/soc/marvell/octeontx2/asm.h | 29 +++
3 files changed, 32 insertions(+), 12 deletions
trol registers.
Usage:
cat /sys/kernel/debug/octeontx2/cpt/cpt_lfs_info
cpt_err_info: dump cpt error registers.
Usage:
/sys/kernel/debug/octeontx2/cpt/cpt_err_info
Signed-off-by: Suheil Chandran
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.h | 6 +
.../marvell/
gracefully.
* Moved OcteonTx2 asm code to a header file under include/linux/soc/
Changes since v1:
* Moved Makefile changes from patch4 to patch2 and patch3.
Srujana Challa (13):
octeontx2-pf: move lmt flush to include/linux/soc
octeontx2-af: add mailbox interface for CPT
octeontx2-af: ad
)),
authenc(hmac(sha512),ecb(cipher_null)),
rfc4106(gcm(aes)).
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig|4 +
drivers/crypto/marvell/octeontx2/Makefile |3 +-
.../marvell/octeontx2/otx2_cpt_reqmgr.h |1 +
.../marvell/octeontx2
Attach LFs to CPT VF to process the crypto requests and register
LF interrupts.
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 2 +-
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 145 +
drivers/crypto/marvell/octeontx2/otx2_cptlf.h | 7 +
.../marvell
Adds support to get engine capabilities and adds a new mailbox
to share the engine capabilities to CPT VFIO drivers.
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 36
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 51 ++
drivers/crypto/marvell
Add support for the Marvell OcteonTX2 CPT virtual function
driver. This patch includes probe, PCI specific initialization
and interrupt handling.
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 4 +-
.../marvell/octeontx2/otx2_cpt_common.h | 1
CPT RVU Local Functions(LFs) needs to be attached to the
PF/VF to submit the instructions to CPT.
This patch adds the interface to initialize and attach
the LFs. It also adds interface to register the LF's
interrupts.
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Mak
AEs), and configures
all engines.
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile |2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 42 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 77 +
drivers/crypto/marvell/octeontx2/otx2_cptpf.h |3
Add new mailbox message to configure a LF for RX inline-IPsec.
This message is added to serve Marvell CPT VFIO driver, since
a VF can not send mailbox messages to admin function(AF)
directly.
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 12 +++
drivers
trol registers.
Usage:
cat /sys/kernel/debug/octeontx2/cpt/cpt_lfs_info
cpt_err_info: dump cpt error registers.
Usage:
/sys/kernel/debug/octeontx2/cpt/cpt_err_info
Signed-off-by: Srujana Challa
---
.../net/ethernet/marvell/octeontx2/af/rvu.h | 6 +
.../marvell/octeontx2/af/rvu_debugfs.c|
IPsec.
Inline-IPsec mailbox messages are added here to provide the interface
to Marvell VFIO drivers to allocate and configure HW resources
for inline IPsec feature.
Signed-off-by: Srujana Challa
---
.../ethernet/marvell/octeontx2/af/Makefile| 3 +-
.../net/ethernet/marvell/octeontx2/af/m
adds support for this 'VF <=> PF <=> AF' mailbox
communication.
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 1 +
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 19 ++
.../marvell/octeontx2/otx2_cptpf_main.c | 209 +++
.
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig| 10 +
drivers/crypto/marvell/Makefile | 1 +
drivers/crypto/marvell/octeontx2/Makefile | 6 +
.../marvell/octeontx2/otx2_cpt_common.h | 32 ++
.../marvell/octeontx2
In the resource virtualization unit (RVU) each of the PF and AF
(admin function) share a 64KB of reserved memory region for
communication. This patch initializes PF <=> AF mailbox IRQs,
registers handlers for processing these communication messages.
Signed-off-by: Srujana Challa
---
d
: Srujana Challa
---
MAINTAINERS | 2 ++
.../marvell/octeontx2/nic/otx2_common.h | 13 +
include/linux/soc/marvell/octeontx2/asm.h | 29 +++
3 files changed, 32 insertions(+), 12 deletions(-)
create mode 100644 include/linux/soc
eader file under include/linux/soc/
Changes since v1:
* Moved Makefile changes from patch4 to patch2 and patch3.
Srujana Challa (13):
octeontx2-pf: move lmt flush to include/linux/soc
octeontx2-af: add mailbox interface for CPT
octeontx2-af: add debugfs entries for CPT block
drivers: crypto
ot;Merge branch 'Offload-tc-vlan-mangle-to-
> mscc_ocelot-switch'")'
> Changes since v3:
> * Splitup the patches into smaller patches with more informartion.
> Changes since v2:
> * Fixed C=1 warnings.
> * Added code to exit CPT VF driver gracefu
)),
authenc(hmac(sha512),ecb(cipher_null)),
rfc4106(gcm(aes)).
Change-Id: Icde4cd251a58185619806c310f42ef567b616db7
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/Kconfig|4 +
drivers/crypto/marvell/octeontx2/Makefile |3 +-
.../marvell/octeontx2
Adds support to get engine capabilities and adds a new mailbox
to share the engine capabilities to CPT VFIO drivers.
Change-Id: Ic43320c02ca4595b5b82f1da9c7d3a070f046f55
Signed-off-by: Srujana Challa
---
.../marvell/octeontx2/otx2_cpt_common.h | 36
.../marvell/octeontx2
Add new mailbox message to configure a LF for RX inline-IPsec.
This message is added to serve Marvell CPT VFIO driver, since
a VF can not send mailbox messages to admin function(AF)
directly.
Change-Id: I66c984eb3a865a28d59952e7210319c669ef9e6c
Signed-off-by: Srujana Challa
---
.../marvell
Attach LFs to CPT VF to process the crypto requests and register
LF interrupts.
Change-Id: Idd9b8ff9a435d9dfc2591f17a84d2f96206dd994
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 2 +-
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 145 +
drivers
CPT RVU Local Functions(LFs) needs to be attached to the
PF/VF to submit the instructions to CPT.
This patch adds the interface to initialize and attach
the LFs. It also adds interface to register the LF's
interrupts.
Change-Id: I6a674bab7f905de63fed0a9b611ac4d69baa164f
Signed-off-by: Sr
AEs), and configures
all engines.
Change-Id: Ib4178b64ad767e6ed4b013e63c99d70eca290753
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile |2 +-
.../marvell/octeontx2/otx2_cpt_common.h | 42 +
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 77 +
drivers
Add support for the Marvell OcteonTX2 CPT virtual function
driver. This patch includes probe, PCI specific initialization
and interrupt handling.
Change-Id: Ib0c81fcc7c0d43144463c37e7ea0e954bafe4b62
Signed-off-by: Srujana Challa
---
drivers/crypto/marvell/octeontx2/Makefile | 4
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