ers
> - elaborated commit message (Luis)
> - collected given tags (incl. Andrew's SoB, see below)
>
> I added Andrew's SoB since part of the fixes I took from him. Andrew,
> feel free to amend or tell me how you want me to do.
>
> [...]
> drivers/power/re
./bindings/power/supply/bq25980.yaml | 1 +
> [...]
Acked-by: Sebastian Reichel
-- Sebastian
signature.asc
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ellWise. The only way to obtain
>it is to mail two batteries to a test facility of CellWise and receive
>back a test report with the binary blob.
> -$ref: /schemas/types.yaml#definitions/uint8-array
> +$ref: /schemas/types.yaml#/definitions/uint8-array
> minItems: 64
> maxItems: 64
>
[...]
Acked-by: Sebastian Reichel
-- Sebastian
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ll take this thru the DT tree.
>
> [...]
> .../bindings/power/supply/cw2015_battery.yaml | 2 ++
> .../bindings/power/supply/rohm,bd99954.yaml | 8
> [...]
Acked-by: Sebastian Reichel
-- Sebastian
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Hi,
On Thu, Jan 24, 2019 at 10:34:50AM +, nicolas.fe...@microchip.com wrote:
> Hi Sebastian,
>
> On 23/01/2019 at 19:34, Sebastian Reichel wrote:
> > Hi,
> >
> > On Wed, Jan 16, 2019 at 10:57:42AM +0100, Nicolas Ferre wrote:
> >> Add support for ad
Hi,
On Wed, Jan 16, 2019 at 10:57:42AM +0100, Nicolas Ferre wrote:
> Add support for additional reset causes and the proper compatibility
> string for sam9x60 SoC. The restart function is the same as the samx7.
>
> Signed-off-by: Nicolas Ferre
> ---
> drivers/power/reset/at91-reset.c | 13 +
7;phy-handle' instead of 'phy-mode'
Changes since PATCHv1:
* Use 'marvell,mv88e6085' instead of introducing compatible
string for mv88e6240.
* Fix indention of DT nodes
* Only enable 'cpu' phy, if explicitly set to "internal".
-- Sebastian
Seb
B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
communicate with a Marvell switch. On all devices the switch is
connected to a PCI based network card, which needs to be referenced
by DT, so this also adds the common PCI root node.
Signed-off-by: Sebastian Reichel
---
arch/arm
hout this
patch.
Signed-off-by: Sebastian Reichel
---
net/dsa/dsa2.c | 7 ++--
net/dsa/dsa_priv.h | 4 +--
net/dsa/legacy.c | 4 +--
net/dsa/port.c | 103 -
4 files changed, 86 insertions(+), 32 deletions(-)
diff --git a/net/dsa/d
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b650v3.dts | 52 ++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts
b/arch/arm/boot/dts/imx6q-b650v3.dts
index 7f9f176901d4..5650a9b11091 100644
--- a/arch/arm/boot
ev ab)
03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b850v3.dts | 75 +
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b450v3.dts | 52 ++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts
b/arch/arm/boot/dts/imx6q-b450v3.dts
index 404a93d9596b..3ec58500e9c2 100644
--- a/arch/arm/boot
Hi,
On Mon, Jan 22, 2018 at 12:56:44PM -0800, Florian Fainelli wrote:
> On 01/22/2018 12:54 PM, Andrew Lunn wrote:
> >> Note: there is still technically a misreprentation of how the PHY is
> >> "attached" to the network device. In your DTSes, you have to have the
> >> CPU port have a "phy-handle"
Hi,
On Mon, Jan 15, 2018 at 11:57:18PM +0100, Andrew Lunn wrote:
> > int dsa_port_fixed_link_register_of(struct dsa_port *dp)
> > {
> > struct device_node *dn = dp->dn;
> > @@ -305,6 +354,10 @@ int dsa_port_fixed_link_register_of(struct dsa_port
> > *dp)
> > ds->ops->adj
y enable 'cpu' phy, if explicitly set to "internal".
-- Sebastian
Sebastian Reichel (5):
net: dsa: Support internal phy on 'cpu' port
ARM: dts: imx6q-bx50v3: Add internal switch
ARM: dts: imx6q-b850v3: Add switch port configuration
ARM: dts: imx6q-b650v3: A
the PHY is disabled without this patch resulting
in missing link and non-functional switch device.
Signed-off-by: Sebastian Reichel
---
net/dsa/dsa2.c | 25 +++--
net/dsa/dsa_priv.h | 1 +
net/dsa/port.c | 49 +
3 files c
B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
communicate with a Marvell switch. On all devices the switch is
connected to a PCI based network card, which needs to be referenced
by DT, so this also adds the common PCI root node.
Signed-off-by: Sebastian Reichel
---
arch/arm
ev ab)
03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b850v3.dts | 75 +
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b450v3.dts | 52 ++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts
b/arch/arm/boot/dts/imx6q-b450v3.dts
index 404a93d9596b..3ec58500e9c2 100644
--- a/arch/arm/boot
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b650v3.dts | 52 ++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts
b/arch/arm/boot/dts/imx6q-b650v3.dts
index 7f9f176901d4..5650a9b11091 100644
--- a/arch/arm/boot
tead of
'phy-mode'
Changes since PATCHv1:
* Use 'marvell,mv88e6085' instead of introducing compatible
string for mv88e6240.
* Fix indention of DT nodes
* Only enable 'cpu' phy, if explicitly set to "internal".
-- Sebastian
Sebastian Reichel (5):
ne
B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
communicate with a Marvell switch. On all devices the switch is
connected to a PCI based network card, which needs to be referenced
by DT, so this also adds the common PCI root node.
Signed-off-by: Sebastian Reichel
---
arch/arm
itch.
The PHY interface, that is being used on the above test systems is
part of the MV88E6240 and since mv88e6xxx driver resets the chip
during probe, it is definitely disabled without this patch.
Signed-off-by: Sebastian Reichel
---
net/dsa/p
ev ab)
03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b850v3.dts | 75 +
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b450v3.dts | 52 ++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts
b/arch/arm/boot/dts/imx6q-b450v3.dts
index 404a93d9596b..3ec58500e9c2 100644
--- a/arch/arm/boot
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b650v3.dts | 52 ++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts
b/arch/arm/boot/dts/imx6q-b650v3.dts
index 7f9f176901d4..5650a9b11091 100644
--- a/arch/arm/boot
B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
communicate with a Marvell switch. On all devices the switch is
connected to a PCI based network card, which needs to be referenced
by DT, so this also adds the common PCI root node.
Signed-off-by: Sebastian Reichel
---
arch/arm
itch.
The PHY interface, that is being used on the above test systems is
part of the MV88E6240 and since mv88e6xxx driver resets the chip
during probe, it is definitely disabled without this patch.
Signed-off-by: Sebastian Reichel
---
net/dsa/port.c | 23 +++
1 file c
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b650v3.dts | 48 ++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts
b/arch/arm/boot/dts/imx6q-b650v3.dts
index 7f9f176901d4..91b5b5157655 100644
--- a/arch/arm/boot
e 'cpu' phy, if explicitly set to "internal".
-- Sebastian
Sebastian Reichel (5):
net: dsa: Support internal phy on 'cpu' port
ARM: dts: imx6q-bx50v3: Add internal switch
ARM: dts: imx6q-b850v3: Add switch port configuration
ARM: dts: imx6q-b650v3: Add switch por
ev ab)
03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b850v3.dts | 71 +
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b450v3.dts | 48 ++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts
b/arch/arm/boot/dts/imx6q-b450v3.dts
index 404a93d9596b..e0bb646e2de7 100644
--- a/arch/arm/boot
Hi,
On Wed, Jan 03, 2018 at 05:48:42PM +0300, Sergei Shtylyov wrote:
> Hello!
>
> On 01/03/2018 03:26 PM, Sebastian Reichel wrote:
>
> > B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
> > communicate with a Marvell switch. On all devices the switch i
Hi Andrew,
On Wed, Jan 03, 2018 at 02:21:28PM +0100, Andrew Lunn wrote:
> On Wed, Jan 03, 2018 at 01:26:04PM +0100, Sebastian Reichel wrote:
> > This adds support for enabling the internal phy for a 'cpu' port.
> > It has been tested on GE B850v3 and B650v3, which have
Add compatible for Marvell 88E6240 switch.
Signed-off-by: Sebastian Reichel
---
Documentation/devicetree/bindings/net/dsa/marvell.txt | 6 --
drivers/net/dsa/mv88e6xxx/chip.c | 4
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/Documentation
ned-off-by: Sebastian Reichel
---
net/dsa/port.c | 26 ++
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/net/dsa/port.c b/net/dsa/port.c
index bb4be2679904..f99c1d34416c 100644
--- a/net/dsa/port.c
+++ b/net/dsa/port.c
@@ -282,6 +282
B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
communicate with a Marvell switch. On all devices the switch is
connected to a PCI based network card, which needs to be referenced
by DT, so this also adds the common PCI root node.
Signed-off-by: Sebastian Reichel
---
arch/arm
ev ab)
03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network
Connection [8086:1533] (rev 03)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b850v3.dts | 70 +
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b450v3.dts | 47 ++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts
b/arch/arm/boot/dts/imx6q-b450v3.dts
index 404a93d9596b..693dfa7d751d 100644
--- a/arch/arm/boot
)
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/imx6q-b650v3.dts | 47 ++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts
b/arch/arm/boot/dts/imx6q-b650v3.dts
index 7f9f176901d4..928f6cd8d5ae 100644
--- a/arch/arm/boot
l phy interface is enabled, so support
for that is added by the first patch in this series.
The patch series is based on v4.15-rc6.
-- Sebastian
Sebastian Reichel (6):
net: dsa: Support internal phy on 'cpu' port
net: dsa: mv88e6xxx: add 88E6240 DT compatible
ARM: dts: imx6q-bx50v
| 32
> ----
Acked-by: Sebastian Reichel
-- Sebastian
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Description: PGP signature
Hi,
On Mon, Aug 21, 2017 at 05:13:12PM +0530, Bhumika Goyal wrote:
> Make these const as they are only passed as an argument to the
> function device_create_file and device_remove_file and the corresponding
> arguments are of type const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Motorola Droid 4 uses a WL 1285C. With differences between
chips not being public let's add explicit binding for wl1285
instead of relying on wl1283 being very similar.
Reviewed-by: Rob Herring
Acked-by: Kalle Valo
Acked-by: Tony Lindgren
Signed-off-by: Sebastian Reichel
---
Changes
Hi,
On Thu, Jun 08, 2017 at 10:17:57AM -0400, David Miller wrote:
> > On Thu, Jun 08, 2017 at 11:32:31AM +0100, Mark Brown wrote:
> >> On Thu, Jun 08, 2017 at 10:57:50AM +0100, Build bot for Mark Brown wrote:
> >>
> >> Today's -next fails to build an ARM allmodconfig due to:
> >>
> >> > arm-all
Hi,
On Thu, Jun 08, 2017 at 11:32:31AM +0100, Mark Brown wrote:
> On Thu, Jun 08, 2017 at 10:57:50AM +0100, Build bot for Mark Brown wrote:
>
> Today's -next fails to build an ARM allmodconfig due to:
>
> > arm-allmodconfig
> > ../drivers/hsi/clients/ssi_protocol.c:1069:5: error: 'struct net
Hi,
On Mon, May 22, 2017 at 11:50:04AM -0500, Rob Herring wrote:
> [...]
> >> >> Thanks, I'll take it then. Not sure why Sebastian was suggested to
> >> >> submit this patch via your tree in the first place.
> >> >>
> >> >> https://patchwork.kernel.org/patch/9713645/
> >> >
> >> > Thanks. The idea
Hi,
On Mon, May 22, 2017 at 11:11:49AM -0500, Rob Herring wrote:
> On Mon, May 22, 2017 at 10:21 AM, Sebastian Reichel
> wrote:
> > Hi,
> >
> > On Mon, May 22, 2017 at 05:44:24PM +0300, Kalle Valo wrote:
> >> David Miller writes:
> >> > From: Kalle
Hi,
On Mon, May 22, 2017 at 05:44:24PM +0300, Kalle Valo wrote:
> David Miller writes:
> > From: Kalle Valo
> > Date: Mon, 22 May 2017 12:28:20 +0300
> >
> >> Sebastian Reichel writes:
> >>
> >>> Motorola Droid 4 uses a WL1285C. With differe
Hi,
On Fri, May 05, 2017 at 09:51:33AM -0500, Adam Ford wrote:
> On Sun, Apr 30, 2017 at 11:04 AM, Sebastian Reichel wrote:
> > On Sun, Apr 30, 2017 at 10:14:20AM -0500, Adam Ford wrote:
> >> On Wed, Apr 5, 2017 at 1:30 PM, Rob Herring wrote:
> >> > This series add
Motorola Droid 4 uses a WL1285C. With differences between the
chips not being public let's add explicit binding for wl1285
instead of relying on wl1283 being very similar.
Reviewed-by: Rob Herring
Acked-by: Kalle Valo
Acked-by: Tony Lindgren
Signed-off-by: Sebastian Reichel
---
Hi Dav
Hi,
On Sun, Apr 30, 2017 at 10:14:20AM -0500, Adam Ford wrote:
> On Wed, Apr 5, 2017 at 1:30 PM, Rob Herring wrote:
> > This series adds serdev support to the HCI LL protocol used on TI BT
> > modules and enables support on HiKey board with with the WL1835 module.
> > With this the custom TI UIM
Hi,
On Thu, Apr 13, 2017 at 10:03:52AM -0500, Rob Herring wrote:
> +static int read_local_version(struct hci_dev *hdev)
> +{
> + int err = 0;
> + unsigned short version = 0;
> + struct sk_buff *skb;
> + struct hci_rp_read_local_version *ver;
> +
> + skb = __hci_cmd_sync(hdev, H
ctive high.
> + - vio-supply : Vio input supply (1.8V)
> + - vbat-supply : Vbat input supply (2.9-4.8V)
> +
> +Example:
> +
> +&serial0 {
> + compatible = "ns16550a";
> + ...
> + bluetooth {
> + compatible = "ti,wl1835-st";
> + enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
> + };
> +};
Reviewed-by: Sebastian Reichel
-- Sebastian
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Description: PGP signature
Hi,
On Thu, Nov 24, 2016 at 05:49:33PM +0100, Pali Rohár wrote:
> On Thursday 24 November 2016 17:08:30 Sebastian Reichel wrote:
> > On Thu, Nov 24, 2016 at 04:20:45PM +0100, Pali Rohár wrote:
> > > On Thursday 24 November 2016 16:13:17 Sebastian Reichel wrote:
> > > &
Hi,
On Thu, Nov 24, 2016 at 04:20:45PM +0100, Pali Rohár wrote:
> On Thursday 24 November 2016 16:13:17 Sebastian Reichel wrote:
> > On Thu, Nov 24, 2016 at 09:33:29AM +0100, Pali Rohár wrote:
> > > On Thursday 24 November 2016 08:51:04 Pavel Machek wrote:
> > >
Hi,
On Thu, Nov 24, 2016 at 09:33:29AM +0100, Pali Rohár wrote:
> On Thursday 24 November 2016 08:51:04 Pavel Machek wrote:
> > Hi!
> >
> > > > "ifconfig hw ether XX" normally sets the address. I guess that's
> > > > ioctl?
> > >
> > > This sets temporary address and it is ioctl. IIRC same as wh
Hi,
On Thu, Oct 20, 2016 at 01:55:22PM -0400, Jarod Wilson wrote:
> hsi/clients/ssi_protocol:
> - use core MTU range checking
> - remove now redundant ssip_pn_set_mtu
Acked-By: Sebastian Reichel
-- Sebastian
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Description: PGP signature
Hi,
On Thu, Mar 03, 2016 at 12:00:14PM +0100, Arnd Bergmann wrote:
> On Thursday 03 March 2016 17:03:37 Krzysztof Kozlowski wrote:
> > diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
> > index 0a6408a39c66..0f34846ae80d 100644
> > --- a/drivers/power/reset/Kconfig
> > +++ b/
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