Hi Stefan,
wt., 13 kwi 2021 o 11:56 Stefan Chulski napisał(a):
>
> > > -Original Message-
> > > From: Russell King - ARM Linux admin
> > > Sent: Tuesday, April 13, 2021 12:18 PM
> > > To: Stefan Chulski
> > > Cc: netdev@vger.kernel.org; thomas.petazz...@bootlin.com;
> > > da...@davemlof
_port_config(port);
>
> - if (mvpp22_rss_is_supported())
> + if (mvpp22_rss_is_supported(port))
> mvpp22_port_rss_init(port);
>
> /* Provide an initial Rx packet size */
> @@ -6861,7 +6864,7 @@ static int mvpp2_port_probe(struct platform_device
> *pdev,
> dev->hw_features |= features | NETIF_F_RXCSUM | NETIF_F_GRO |
> NETIF_F_HW_VLAN_CTAG_FILTER;
>
> - if (mvpp22_rss_is_supported()) {
> + if (mvpp22_rss_is_supported(port)) {
> dev->hw_features |= NETIF_F_RXHASH;
> dev->features |= NETIF_F_NTUPLE;
> }
> --
> 1.9.1
>
Reviewed-by: Marcin Wojtas
Thanks!
add PPv23 version definition.
> > > PPv23 is new packet processor in CP115.
> > > Everything that supported by PPv22, also supported by PPv23.
> > > No functional changes in this stage.
> > >
> > > Signed-off-by: Stefan Chulski
> > > Acked-b
Hi,
czw., 11 lut 2021 o 15:19 Andrew Lunn napisał(a):
>
> On Thu, Feb 11, 2021 at 08:22:19AM +, Stefan Chulski wrote:
> >
> > >
> > > --
> > > From:
> > > Date: Wed, 10 Feb 2021 11:48:17 +0200
> > >
> > > >
> > > > +static i
flow control
> net: mvpp2: set 802.3x GoP Flow Control mode
> net: mvpp2: add TX FC firmware check
>
> Documentation/devicetree/bindings/net/marvell-pp2.txt | 6 +-
> arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 2 +-
> drivers/net/ethernet/marvell/mvpp2/mvpp2.h| 124 -
> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 526
> ++--
> 4 files changed, 609 insertions(+), 49 deletions(-)
>
For the series:
Acked-by: Marcin Wojtas
Thanks,
Marcin
Hi,
pon., 8 lut 2021 o 09:33 napisał(a):
>
> From: Stefan Chulski
>
> This patch add PPv23 version definition.
> PPv23 is new packet processor in CP115.
> Everything that supported by PPv22, also supported by PPv23.
> No functional changes in this stage.
>
> Signed-off-by: Stefan Chulski
> ---
Hi,
pon., 8 lut 2021 o 09:33 napisał(a):
>
> From: Stefan Chulski
>
> This patch adds CM3 memory map and CM3 read/write callbacks.
The read/write callbacks are not added in this patch, please correct
the commit message.
Best regards,
Marcin
>
> Signed-off-by: Stefan Chulski
> Reviewed-by: An
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> The firmware needs to monitor the RX Non-occupied descriptor
> bits for flow control to move to XOFF mode.
> These bits need to be unmasked to be functional, but they will
> not raise interrupts as we leave the RX exception sum
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> This patch adds RXQ flow control configurations.
> Flow control disabled by default.
> Minimum ring size limited to 1024 descriptors.
>
> Signed-off-by: Stefan Chulski
> ---
> drivers/net/ethernet/marvell/mvpp2/mvpp2.h |
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> Armada hardware has a pause generation mechanism in GOP (MAC).
> The GOP generate flow control frames based on an indication programmed in
> Ports Control 0 Register. There is a bit per port.
> However assertion of the PortX
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> Feature double size of BPPI by decreasing number of pools from 16 to 8.
How about:
'The PP2v23 hardware supports a feature allowing to double the size of...' ?
> Increasing of BPPI size protect BM drop from BPPI underrun.
> U
Hi,
wt., 2 lut 2021 o 09:18 napisał(a):
>
> From: Stefan Chulski
>
> New FIFO flow control feature were added in PPv23.
s/were/was/
Thanks,
Marcin
> PPv2 FIFO polled by HW and trigger pause frame if FIFO
> fill level is below threshold.
> FIFO HW flow control enabled with CM3 RXQ&BM flow
> c
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> Currently we have PP2v1 and PP2v2 hw-versions, with some different
> handlers depending upon condition hw_version = MVPP21/MVPP22.
> In a future there will be also PP2v3. Let's use now the generic
> "if equal/notEqual MVPP21" f
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Stefan Chulski
>
> This patch add PPv23 version definition.
> PPv23 is new packet processor in CP115.
> Everything that supported by PPv22, also supported by PPv23.
> No functional changes in this stage.
>
> Signed-off-by: Stefan Chulski
> ---
>
Hi,
wt., 2 lut 2021 o 09:17 napisał(a):
>
> From: Konstantin Porotchkin
>
> CM3 SRAM address space would be used for Flow Control configuration.
>
> Signed-off-by: Stefan Chulski
> Signed-off-by: Konstantin Porotchkin
> ---
> arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++
> 1
czw., 28 sty 2021 o 17:43 Russell King - ARM Linux admin
napisał(a):
>
> On Wed, Jan 27, 2021 at 01:43:16PM +0200, stef...@marvell.com wrote:
> > Armada hardware has a pause generation mechanism in GOP (MAC).
> > The GOP generate flow control frames based on an indication programmed in
> > Ports
t(mask, Autoneg);
> phylink_set_port_modes(mask);
> - phylink_set(mask, Pause);
> - phylink_set(mask, Asym_Pause);
>
> switch (state->interface) {
> case PHY_INTERFACE_MODE_10GBASER:
> --
> 1.9.1
>
Acked-by: Marcin Wojtas
Thanks!
_buff()
>
> Changes since v1:
> - introduce xdp_prepare_buff utility routine
>
> Lorenzo Bianconi (2):
> net: xdp: introduce xdp_init_buff utility routine
> net: xdp: introduce xdp_prepare_buff utility routine
>
> Acked-by: Shay Agroskin
> Acked-by: Martin Habets
> Acked-by: Camelia Groza
>
For Marvell mvpp2:
Acked-by: Marcin Wojtas
Thanks,
Marcin
pon., 21 gru 2020 o 20:07 Sasha Levin napisał(a):
>
> On Mon, Dec 21, 2020 at 10:47:57AM -0800, Jakub Kicinski wrote:
> >On Mon, 21 Dec 2020 18:30:32 + Russell King - ARM Linux admin wrote:
> >> On Mon, Dec 21, 2020 at 10:25:39AM -0800, Jakub Kicinski wrote:
> >> > We need to work with stable
Hi Jakub,
czw., 10 gru 2020 o 15:35 Marcin Wojtas napisał(a):
>
> Hi Greg,
>
> śr., 9 gru 2020 o 11:59 Greg Kroah-Hartman
> napisał(a):
> >
> > On Tue, Dec 08, 2020 at 04:02:50PM +0100, Marcin Wojtas wrote:
> > > Hi Sasha,
> > >
> &g
TXDONE_COAL_USEC;
>
> port->txqs = devm_kcalloc(dev, port->ntxqs, sizeof(*port->txqs),
> --
I confirm the patch fixes issue - tested on CN913x-DB and RGMII port.
Other boards there I see no regression.
Acked-by: Marcin Wojtas
Thanks,
Marcin
GMII;
> else if (port->gop_id == 3)
> - val &= ~GENCONF_CTRL0_PORT1_RGMII_MII;
> + val &= ~GENCONF_CTRL0_PORT3_RGMII_MII;
> regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val);
> }
> }
> --
I tested the patch and LGTM.
Acked-by: Marcin Wojtas
Thanks,
Marcin
czw., 17 gru 2020 o 15:09 Andrew Lunn napisał(a):
>
> > Do you think it's a fix that should be backported to stable branches?
> > If yes, please add 'Fixes: ("commit title")' and it may be
> > good to add 'Cc: sta...@vger.kernel.org' adjacent to the Signed-off-by
> > tag.
>
> netdev patches shoul
Hi Stefan,
czw., 17 gru 2020 o 10:42 napisał(a):
>
> From: Stefan Chulski
>
> Force link UP can be enabled by bootloader during tftpboot
> and breaks NFS support.
> Force link UP disabled during port init procedure.
>
> Signed-off-by: Stefan Chulski
> ---
What are the updates against v1? Pleas
Since its creation Marvell NIC driver for Armada 375/7k8k and
CN913x SoC families mvpp2 has been lacking an entry in MAINTAINERS,
which sometimes lead to unhandled bugs that persisted
across several kernel releases.
Signed-off-by: Marcin Wojtas
---
MAINTAINERS | 8
1 file changed, 8
pt., 11 gru 2020 o 16:42 Russell King - ARM Linux admin
napisał(a):
>
> On Fri, Dec 11, 2020 at 03:41:47PM +0100, Marcin Wojtas wrote:
> > Since its creation Marvell NIC driver for Armada 375/7k8k and
> > CN913x SoC families mvpp2 has been lacking an entry in MAINTAINERS,
> &
Since its creation Marvell NIC driver for Armada 375/7k8k and
CN913x SoC families mvpp2 has been lacking an entry in MAINTAINERS,
which sometimes lead to unhandled bugs that persisted
across several kernel releases.
Signed-off-by: Marcin Wojtas
---
MAINTAINERS | 7 +++
1 file changed, 7
czw., 10 gru 2020 o 21:26 Andrew Lunn napisał(a):
>
> > +1. As soon as the MDIO+ACPI lands, I plan to do the rework.
>
> Don't hold you breath. It has gone very quiet about ACPI in net
> devices.
I saw the results of the upcoming next revision from NXP, so I'm
rather optimistic.
Best regards,
Ma
czw., 10 gru 2020 o 18:56 Russell King - ARM Linux admin
napisał(a):
>
> On Thu, Dec 10, 2020 at 06:43:50PM +0100, Marcin Wojtas wrote:
> > I must admit that due to other duties I did not follow the mainline
> > mvpp2 for a couple revisions (and I am not maintainer of it). Howe
Hi Russell,
czw., 10 gru 2020 o 16:46 Russell King - ARM Linux admin
napisał(a):
>
> On Thu, Dec 10, 2020 at 03:35:29PM +0100, Marcin Wojtas wrote:
> > Hi Greg,
> >
> > śr., 9 gru 2020 o 11:59 Greg Kroah-Hartman
> > napisał(a):
> > > What part fixes the
Hi Greg,
śr., 9 gru 2020 o 11:59 Greg Kroah-Hartman
napisał(a):
>
> On Tue, Dec 08, 2020 at 04:02:50PM +0100, Marcin Wojtas wrote:
> > Hi Sasha,
> >
> > wt., 8 gru 2020 o 14:35 Sasha Levin napisał(a):
> > >
> > > On Tue, Dec 08, 2020 at 01:03:38PM
Hi Sasha,
wt., 8 gru 2020 o 14:35 Sasha Levin napisał(a):
>
> On Tue, Dec 08, 2020 at 01:03:38PM +0100, Marcin Wojtas wrote:
> >Hi Greg,
> >
> >Apologies for delayed response:.
> >
> >
> >pon., 2 lis 2020 o 19:02 Greg Kroah-Hartman
> > napisał(
Hi Greg,
Apologies for delayed response:.
pon., 2 lis 2020 o 19:02 Greg Kroah-Hartman
napisał(a):
>
> On Mon, Nov 02, 2020 at 06:38:54PM +0100, Marcin Wojtas wrote:
> > Hi Greg and Sasha,
> >
> > pt., 9 paź 2020 o 05:43 Marcin Wojtas napisał(a):
> > >
> >
Hi Greg and Sasha,
pt., 9 paź 2020 o 05:43 Marcin Wojtas napisał(a):
>
> Hi,
>
> sob., 20 cze 2020 o 11:21 Russell King
> napisał(a):
> >
> > Add a helper to convert the struct phylink_config pointer passed in
> > from phylink to the drivers internal struct
Hi,
sob., 20 cze 2020 o 11:21 Russell King napisał(a):
>
> Add a helper to convert the struct phylink_config pointer passed in
> from phylink to the drivers internal struct mvpp2_port.
>
> Signed-off-by: Russell King
> ---
> .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 29 +--
Hi Russell,
czw., 28 lut 2019 o 10:36 Russell King - ARM Linux admin
napisał(a):
>
> On Wed, Feb 27, 2019 at 06:47:32PM +0100, Marcin Wojtas wrote:
> > Current version of the driver was configuring XLG MAC
> > in a way to wait 3 IDLE frames before allowing for the
> >
ylink support")
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 16066c2..f1378f9 10
Hi Jisheng,
śr., 19 gru 2018 o 04:11 Jisheng Zhang napisał(a):
>
>
> On Mon, 17 Dec 2018 08:37:35 +0100 Thomas Petazzoni wrote:
>
> > Hello Marcin,
> >
> > On Mon, 17 Dec 2018 00:25:58 +0100, Marcin Wojtas wrote:
> >
> > > Thanks. Indeed, the patc
Hi David,
niedz., 16 gru 2018 o 21:41 David Miller napisał(a):
>
> From: Marcin Wojtas
> Date: Tue, 11 Dec 2018 13:56:49 +0100
>
> > Recent changes in the mvneta driver reworked allocation
> > and handling of the ingress buffers to use entire pages.
> > Apart from
Hi Jisheng,
śr., 12 gru 2018 o 10:25 Jisheng Zhang napisał(a):
>
> Hi Marcin,
>
> On Wed, 12 Dec 2018 09:22:57 +0100 Marcin Wojtas wrote:
>
> > Hi Jisheng,
> >
> > śr., 12 gru 2018 o 03:48 Jisheng Zhang
> > napisał(a):
> > >
> > >
Hi Jisheng,
śr., 12 gru 2018 o 03:48 Jisheng Zhang napisał(a):
>
> Hi,
>
> On Tue, 11 Dec 2018 13:56:49 +0100 Marcin Wojtas wrote:
>
> > Recent changes in the mvneta driver reworked allocation
> > and handling of the ingress buffers to use entire pages.
> > Apar
unused frag_size field of the mvneta_port
structure.
Fixes: 562e2f467e71 ("net: mvneta: Improve the buffer allocation
method for SWBM")
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvneta.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/d
[Resend in UTF-8]
Hi Marc,
You use _really_ archaic firmware, the bug you see is 99% caused by a
bug already fixed long time ago (cleanup all PP2 BM pools correctly
during exit boot services). Please grab the latest release:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/wiki/fil
Hi Rafael,
2018-01-24 3:08 GMT+01:00 Rafael J. Wysocki :
> On Tue, Jan 23, 2018 at 7:12 AM, Marcin Wojtas wrote:
>> Hi Rafael,
>>
>>> > if (res)
>>> > return res;
>>> >
>>> > - return device
Hi Rafael,
> > if (res)
> > return res;
> >
> > - return device_get_mac_addr(dev, "address", addr, alen);
> > + return fwnode_get_mac_addr(fwnode, "address", addr, alen);
> > +}
> > +EXPORT_SYMBOL(fwnode_get_mac_address);
>
> That should be EXPORT_SYMBOL_GPL().
2018-01-22 16:57 GMT+01:00 David Miller :
> From: Andrew Lunn
> Date: Mon, 22 Jan 2018 15:43:42 +0100
>
>> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>>> From: Marcin Wojtas
>>> Date: Mon, 22 Jan 2018 14:00:37 +0100
>>>
>>> &g
2018-01-22 15:43 GMT+01:00 Andrew Lunn :
> On Mon, Jan 22, 2018 at 09:35:25AM -0500, David Miller wrote:
>> From: Marcin Wojtas
>> Date: Mon, 22 Jan 2018 14:00:37 +0100
>>
>> > There's a discussion about the ACPI vs generic MDIO/PHY change under
>> >
> I tested the series on a MacchiatoBin to ensure the mvpp2 DT support was
> still working. I was able to use all supported ports as before, and saw
> no issue.
>
> For all mvpp2 patches, you can add:
>
> Tested-by: Antoine Tenart
>
> Thanks!
> Antoine
>
> On Thu,
Hi Mika,
2018-01-18 14:00 GMT+01:00 Andrew Lunn :
>> I CC'ed Mika since he is more familiar with handling these bits of ACPI
>> specs - I wonder whether this is a problem that cropped up on x86
>> systems too.
>
> Hi Lorenzo
>
> There is nothing about MDIO, PHYs, Ethernet switches, etc in version
lable fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 1d6c9d9..613ba82 1
duplication.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a
- Update driver with new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojta
nodes
comprising their own _CRS methods with interrupts description.
In order to be able o satisfy compilation with !CONFIG_ACPI
and also simplify the new code, introduce a helper macro
(ACPI_HANDLE_FWNODE), with which it is possible to reach
an ACPI handle directly from its fwnode.
Signed-off-by: Marcin W
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
eased, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/drivers/net/ethernet/ma
-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drivers/net/ethernet/marvell
Hi Andrew,
2018-01-17 19:11 GMT+01:00 Andrew Lunn :
> On Wed, Jan 17, 2018 at 05:55:39PM +0100, Marcin Wojtas wrote:
>> Hi,
>>
>> This is a third version of the patchset introducing mvpp2 driver ability
>> to operate with ACPI. Until follow-up generic MDIO is introduc
duplication.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a
iver with new helper routines usage
- Improve commit log.
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojtas (7):
device pro
.
Signed-off-by: Marcin Wojtas
Acked-by: Rafael J. Wysocki
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
nodes
associated to kernel's struct platform_device.
This patch introduces new helper routine - fwnode_irq_get(),
which allows to get the IRQ number directly from the fwnode
to be used as common for OF/ACPI worlds.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c
-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 45 +++-
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
index 7f42d90..f16448e 100644
--- a/drivers/net/ethernet/marvell
lable fwnodes, using the
new function described above.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 26
include/linux/property.h | 6 +
2 files changed, 32 insertions(+)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index adb3893..2343906 1
eased, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 133 ++--
1 file changed, 94 insertions(+), 39 deletions(-)
diff --git a/drivers/net/ethernet/ma
2018-01-09 11:19 GMT+01:00 Graeme Gregory :
> On Mon, Jan 08, 2018 at 06:17:06PM +0100, Marcin Wojtas wrote:
>> Hi Andrew,
>>
>>
>>
>> 2018-01-08 16:42 GMT+01:00 Andrew Lunn :
>> > w> I am not familiar with MDIO, but if its similar or a specific
>>
Hi Andrew,
2018-01-08 16:42 GMT+01:00 Andrew Lunn :
> w> I am not familiar with MDIO, but if its similar or a specific
>> implementation of a serial bus that does sound sane!
>
Thanks for digging, I will check if and how we can use
GenericSerialBus with MDIO.
Best regards,
Marcin
> It is a tw
Russell,
2018-01-03 18:54 GMT+01:00 Russell King - ARM Linux :
> On Wed, Jan 03, 2018 at 05:00:47PM +, Stefan Chulski wrote:
>> > > > -Original Message-
>> > > > Hi Russell,
>> > > >
>> > > > Indeed. RGMII MAC behaves same way, although it shouldn't be named
>> > > > as 'in- band' to b
2018-01-03 14:33 GMT+01:00 Andrew Lunn :
> On Wed, Jan 03, 2018 at 02:13:09PM +0100, Marcin Wojtas wrote:
>> Hi Andrew,
>>
>> 2018-01-03 13:47 GMT+01:00 Andrew Lunn :
>> >> I already agreed with 'reg' being awkward in the later emails.
>> >> W
Hi Andrew,
2018-01-03 13:47 GMT+01:00 Andrew Lunn :
>> I already agreed with 'reg' being awkward in the later emails.
>> Wouldn't _ADR be more appropriate to specify PHY address on MDIO bus?
>
> Also, how do you specify which MDIO bus the PHY is on. To fully
> specify a PHY, you need both bits of
Graeme,
2018-01-03 12:16 GMT+01:00 :
> On Sun, Dec 31, 2017 at 08:23:54PM +0100, Andrew Lunn wrote:
>> > * Modify way of obtaining interrupts - with ACPI they are resources
>> > bound to struct platform_device and it's not possible to obtain
>> > them directly from the child node. Hence a for
Hi Graeme,
2018-01-03 12:00 GMT+01:00 Graeme Gregory :
> On Mon, Dec 18, 2017 at 10:40:31AM +0100, Ard Biesheuvel wrote:
>> On 18 December 2017 at 10:17, Marcin Wojtas wrote:
>> > Hi,
>> >
>> > This patchset introduces ACPI support in mvpp2 and mvmdio drivers
2018-01-02 15:08 GMT+01:00 Andrew Lunn :
>> Indeed in of_mdio_bus_register_phy, there is of_irq_get. This is more
>> a discussion for a MDIO bus / ACPI patchset, but we either find a way
>> to use IRQs with ACPI obtained from child nodes or for this world the
>> functionality will be limited (at le
Hi Andrew,
2018-01-02 14:33 GMT+01:00 Andrew Lunn :
>> Apart from the phylink's SFP support that may require in-band
>> management, it's an alternative to the normal PHY handling. Once MDIO
>> bus + PHYs are supported for ACPI, phylib support will be used instead
>> of the IRQs, so there should be
Hi Russell,
2017-12-30 18:31 GMT+01:00 Russell King - ARM Linux :
> Hi Marcin,
>
> On Sat, Dec 30, 2017 at 05:34:23PM +0100, Marcin Wojtas wrote:
>> Yes, I already split the series and will send first one right away. I
>> will be followed by MDIO bus / PHY handling proposal,
HI Andrew,
2017-12-31 20:23 GMT+01:00 Andrew Lunn :
>> * Modify way of obtaining interrupts - with ACPI they are resources
>> bound to struct platform_device and it's not possible to obtain
>> them directly from the child node. Hence a formula is used, depending
>> on the port_id and number
Hi Andrew,
2017-12-31 20:18 GMT+01:00 Andrew Lunn :
> On Sun, Dec 31, 2017 at 12:58:39PM +0100, Marcin Wojtas wrote:
> Hi Marcin
>
>> Because there is no equivalent for for_each_available_child_of_node(),
>> use device_for_each_child_node() and check the port avail
regards,
Marcin
Changelog:
v1 -> v2:
* Remove MDIO patches
* Use PP2 ports only with link interrupts
* Release second region resources in mvpp2 driver (code moved from
mvmdio), as explained in details in 5/5 commit message.
Marcin Wojtas (5):
device property: Introduce fwnode_get_mac_addr
erlapped by second
region of the network controller, make sure it is released, before
requesting it again. The care is taken by mvpp2 driver to avoid
concurrent access to this memory region.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 147 ++--
1
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
device_for_each_child_node() and check the port availability
inside the mvpp2_port_probe() routine.
This patch replaces of_* function with device_*/fwnode_*
where possible in the mvpp2.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 47 +++-
1 file changed, 26 insertions
.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a/drivers/base/property.c
+++ b
duplication.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a 100644
--- a/drivers/base
Hi Russell and Stefan,
2017-12-29 12:38 GMT+01:00 Russell King - ARM Linux :
> On Fri, Dec 29, 2017 at 12:12:15PM +0100, Marcin Wojtas wrote:
>> Hi Russell,
>>
>> I see that I misspelled your email address, hence the series remained
>> unnoticed:
>> https://lkml
Hi Russell,
2017-12-28 19:46 GMT+01:00 Russell King - ARM Linux :
> On Thu, Dec 28, 2017 at 07:27:39PM +0100, Antoine Tenart wrote:
>> Hi Florian,
>>
>> On Thu, Dec 28, 2017 at 07:02:09AM -0800, Florian Fainelli wrote:
>> > On 12/28/2017 02:05 AM, Antoine Tenart wrote:
>> > > On Thu, Dec 28, 2017
Hi Andrew,
2017-12-19 21:46 GMT+01:00 Andrew Lunn :
>> Of course! v2 will not have such problem, I've been waiting however
>> for the feedback about the ACPI representation. Anyway, I'm strongly
>> leaning towards using _ADR/_CID objects in PHY's nodes for ACPI, so
>> maybe I'll just issue the v2
Hi David,
2017-12-19 19:48 GMT+01:00 David Miller :
> From: Marcin Wojtas
> Date: Mon, 18 Dec 2017 10:17:56 +0100
>
>> Above support configures 1G to use its PHY normally. 10G can work now
>> only with the link interrupt mode. Somehow reading of the
Hi Ard
2017-12-18 10:40 GMT+01:00 Ard Biesheuvel :
> On 18 December 2017 at 10:17, Marcin Wojtas wrote:
>> Hi,
>>
>> This patchset introduces ACPI support in mvpp2 and mvmdio drivers.
>> First three patches introduce fwnode helpers for obtaining PHY
>> informatio
kernel patches.
Best regards,
Marcin
Marcin Wojtas (8):
device property: Introduce fwnode_get_mac_address()
device property: Introduce fwnode_get_phy_mode()
mdio_bus: Introduce fwnode MDIO helpers
net: mvmdio: add ACPI support
net: mvpp2: simplify maintaining enabled ports' list
duplication.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 28 ++--
include/linux/property.h | 2 ++
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index 851b1b6..f261d1a 100644
--- a/drivers/base
.
Signed-off-by: Marcin Wojtas
---
drivers/base/property.c | 24
include/linux/property.h | 1 +
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/base/property.c b/drivers/base/property.c
index f261d1a..7c4a53d 100644
--- a/drivers/base/property.c
+++ b
compatible string)
* MDIO bus auto scanning
Signed-off-by: Marcin Wojtas
---
drivers/net/phy/mdio_bus.c | 218
include/linux/mdio.h | 3 +
2 files changed, 221 insertions(+)
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index a0f34c3..f2b2a94 100644
ing in the controller's private array, whose size is now not
dynamically allocated, but fixed to MVPP2_MAX_PORTS.
This patch simplifies creating and filling list of enabled ports and
is a part of the preparation for adding ACPI support in the mvpp2 driver.
Signed-off-by: Marcin Wojtas
-
s patch also ensures releasing resources by
mvmdio driver prior to initializing the network controller driver.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvmdio.c | 42 +++-
1 file changed, 40 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/m
27;s not possible to obtain
them directly from the child node. Hence a formula is used, depending
on the port_id and number of possible CPUs.
Moreover when booting with ACPI MVPP2_QDIST_MULTI_MODE is picked by
default, as there is no need to keep any kind of the backward
compatibility.
Signed-off-by
Newly introduced mvmdio driver ACPI support and also fwnode
MDIO helpers allow for switching to PHY handling with its fwnode.
This patch replaces of_* related PHY handling function with
the fwnode_* equivalent and updates mvpp2_port structure
accordingly.
Signed-off-by: Marcin Wojtas
device_for_each_child_node() and check the port availability
inside the mvpp2_port_probe() routine.
This patch replaces of_* function with device_*/fwnode_*
where possible in the mvpp2.
Signed-off-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvpp2.c | 47 +++-
1 file changed, 26 insertions
dreas' and my problems we can exclude the 6ad2
>> > > patch as the source of the errors.
>> >
>> > Simon, 2a90f7e1d5d04e4f1060268e0b55a2c702bbd67a is your commit, adding
>> > xmit_more support, and a number of people are reporting stability
>> > issues with t
Hi Antoine,
You can add
Tested-by: Marcin Wojtas
Best regards,
Marcin
2017-09-21 15:45 GMT+02:00 Antoine Tenart :
> Convert the PPv2 driver to use phylink, which models the MAC to PHY
> link. The phylink support is made such a way the GoP link IRQ can still
> be used: the two
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